I put the following code in an interrupt that triggers every 1ms (just as a test), but my watchdog still resets my MCU. Why?
I'm certain it's the watchdog resetting me because I check the SRS register at startup to know the reason for any reboot.
WDOG_REFRESH = 0xA602; WDOG_REFRESH = 0xB480;
Here's my function to initialize the Watchdog. Can anyone think of something I've missed?
/* ================================================================================================= FUNCTION DESCRIPTION:== Initialize the Watchdog (COP).==== OUTPUTS:== N/A == =============================================================================================*/void WATCHDOG__initialize ( void ) { /* Enable interrupts for Watchdog. */ ARM_CORTEX_M4__enable_interrupt( INT_Watchdog ); WDOG_TOVALH = WDOG_TOVALH_TOVALHIGH( MAX_U16 ); WDOG_TOVALL = WDOG_TOVALL_TOVALLOW( MAX_U16 ); /* Unlock and enable the Watchdog timer. */ WDOG_UNLOCK = 0xC520; WDOG_UNLOCK = 0xD928; WDOG_STCTRLH |= WDOG_STCTRLH_WDOGEN_MASK | WDOG_STCTRLH_IRQRSTEN_MASK; WDOG_REFRESH = 0xA602; WDOG_REFRESH = 0xB480; } /* WATCHDOG__initialize() */
Hi, I recently came across this problem and you are also stuck at the same place.
From the reference manual, the refresh code must be executed within 20 bus clock cycles after first trigger.
I feel the refresh may execute within 20 bus cycles but another refresh trigger may be kicked before the 20 bus cycles of the previous refresh was over. What i conclude from this is you need to wait for sometime before you execute the refresh again.
The best thing to do is and THE SOLUTION TO THIS PROBLEM FOR ME was to add a very small delay before executing the refresh to the watch dog.
REFRESH DOESNOT REQUIRE UNLOCKING OF THE WATCHDOG REGISTERS
Best Regards
Kashyap Gada
Fellas, sorry for the late follow-up.
I did try your suggestions, but did not have any luck.
Konrada, What do you mean by WDOG_TOVAL[HL]?
Is this what you mean? I'm already doing this.
WDOG_TOVALH = WDOG_TOVALH_TOVALHIGH( MAX_U16 );
Hi
1) Retriggering the watchdog when it hasn't been enabled causes a reset - therefore ensure carefully that the watchdog has in fact been enabled correctly.
2) I use the following initialisation sequence
UNLOCK_WDOG(); // this sequence must be performed within 20 bus cycles and the writes are possible for the WCT periodWDOG_TOVALL = 2000;WDOG_TOVALH = 0;WDOG_STCTRLH = (WDOG_STCTRLH_STNDBYEN | WDOG_STCTRLH_WAITEN | WDOG_STCTRLH_STOPEN | WDOG_STCTRLH_WDOGEN); // watchdog enabled to generate reset on 2s timeout (no further updates allowed)
I note that you write the timeout before unlocking the watchdog - maybe this is the cause of difficulties (?). Also the above writes the low value followed by high value (ordering may not be important but best check).
Regards
Mark
I think the problem is, you're trying to refresh the WDOG immediately after unlocking it. A watch dog refresh won't be seen withing the WCT window after an unlock. In the unlocking and updating section(23.3.1) of the WDOG chapter, it states:
Also, an attempted refresh operation between the two writes of the unlock sequence and in the WCT time following a successful unlock, goes undetected.
You don't need to unlock the WDOG when you refresh it.