Is my method of detecting parity error correct on the Kinetis MKM34?

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Is my method of detecting parity error correct on the Kinetis MKM34?

Contributor I

Hi everyone, I am currently using a method to detect parity errors on my Kinetis MKM34's UART. I want to know if this is the right way to implement it. My supported UART configurations are 8N2, 8E1 and 8O1. For even and odd parity I am using the UART_ED register and checking the PARITYE bit for detecting parity errors. For none parity with 2 stop bits, I am using the UART_C3 register and the R8 bit in it. Since the R8 bit indicates the ninth bit received, it has to be the stop bit for no parity. Since the stop bit is always high, I am considering a low stop bit to be a parity error condition. Is this approach correct or should I change anything about how parity errors are detected?

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NXP Employee
NXP Employee

Hi Adithya Kiran

So, For the 8E1 and 8O1 cases you are checking PARITYE from UART_ED register, witch is correct, not problem here. About 8N2 I don't fully understand what are you trying to implement, Are your talking about configure your MKM34 as 9N1, but only receive an 8 bit with parity enable data? and detect the parity in the ninth bit received? Could you clarify your method?

NOTE: If you configure your MCU as 8 bit mode, R8 bit in UART_C3 register will not change because MCU will not load any value here, so, it will not represent the stop bit nor the parity bit.

Have a great day,
Jorge Alcala

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