Inquiry about how to set appropriate mailbox and msg_ID

[Sang-Hoon_Ahn]

hello
I'm using the MPC5748 gw rgb board, and I'm trying to implement 8-channel CAN FD communication based on the flexcan example on that board.

Looking at the example of the board, there are TX, RX mailbox and msg_ID setting parts in Master/Slave setting.
#if defined(MASTER)
#define TX_MAILBOX (1UL)
#define TX_MSG_ID (1UL)
#define RX_MAILBOX (0UL)
#define RX_MSG_ID (2UL)
#elif defined(SLAVE)
#define TX_MAILBOX (0UL)
#define TX_MSG_ID (2UL)
#define RX_MAILBOX (1UL)
#define RX_MSG_ID (1UL)
#endif

Looking for examples of other boards, the mailbox and msg_ID are defined with different numbers, and the HAL driver of the stm board provides a function to find an empty mailbox.

/* Definition of the TX and RX message buffers depending on the bus role */
#define TX_MAILBOX (11UL)
#define TX_MSG_ID (1UL)
#define RX_MAILBOX (10UL)
#define RX_MSG_ID (20UL)

I understand that the advantage of flexcan is that mailboxes can be flexibly applied.
Flexible mailboxes (0/8/16/32/64 bytes data length)

Based on the above document, I understood that the mailbox can be arbitrarily designated as 64 bytes. Is this correct?

Also, I want to define a total of 16 mailboxes for each activated CAN channel like the code below. Is this an efficient method?
Is there any problem if MSG_ID is declared arbitrarily in the same way?

#define CAN1_TX_MAILBOX (1UL)
#define CAN2_TX_MAILBOX (2UL)
#define CAN3_TX_MAILBOX (3UL)
#define CAN4_TX_MAILBOX (4UL)
#define CAN5_TX_MAILBOX (5UL)
#define CAN6_TX_MAILBOX (6UL)
#define CAN7_TX_MAILBOX (7UL)
#define CAN8_TX_MAILBOX (8UL)

[PetrS]

Hi,

you can use any of the available MBs for transmission or reception, also the configured ID can be any you need. Only note that number of MBs participating in the matching and arbitration processes is given by MCR[MAXMB] config.
It is not completely correct that the MB can be arbitrarily designated with 64 bytes payload. MB area is partitioned in tree blocks and each block can be configured for different payload, thus with payload increased a number of available MBs decreases. See Table 43-11. RAM partition for more info. So for example if block 0 is set for 64byte payload, just 7 MBs are available in this block and each MB can send number of data bytes defined by DLC field (Table 43-10. DATA BYTEs validity).

BR, Petr