I am getting error while reading a ADC on few consecutive channels. This event happens randomly. During this event few channels become zero for two reading cycles.
But what I realized is that it starts from channel whose reading is around 60(out of 32767). 4 Channel after this channel reading also becomes zero.
I read in Errata issue little related to this:
"When sampling two ADC channels that are time-consecutively listed and from the same ADC block, if the first channel input voltage is slightly less than VREFL or slightly greater than VREFH, incorrect readings on the second conversion may result."
But in my case I have never seen voltage going below VREFL and going above VREFH.
Please provide some insight into this. I have attached circuit design for generating Ref voltage.
Do you see the same behavior when modifying sampling frequency? Are you sampling at a correct frequency?
ADC sampling frequency must be at least twice the analog signal frequency. Sampling the signal at twice the analog signal frequency will not result in a loss of information. If sampling frequency is less, then the information will be lost.