I am not sure that if the back-biased protection diodes stay connected to 3.3V Kinetis pins when you configure them to I2C.
If you tie pull-up resistors to 3.3V, it should work with no risk to any component tied to I2C. Inputs of 3.3V devices will not hold any chance to be overloaded, and inputs of 5V devices will recognize the 3.3V on SDA and SCL lines as high-level. I have worked on many projects where I connected 3.3V outputs to 5V inputs, and logic levels were always recongized correctly.
So this is my suggestion: use pull-up resistors tied to 3.3V if there is any 3.3V device connected to I2C bus.
I hope it helps.
All I can say about that is check your Vih(min) spec! Many 'modern' CMOS parts stick to the 0.7*Vcc requirement, which at 5V+5% is 3.675V -- can be hard to hit, even driving against 'diode clamps' to a 3.3V-5% power rail -- needs 0.54V over-rail-drive (with NO resulting noise margin!).
Maybe we should ask first why the question was posted in the first place. We are supposing that Matthew intends to connect some 5V I2C device on the I2C bus of a Kinetis powered with 3.3V. I woule like to know what he intends to connect to the bus, i.e., the part number. Maybe there is a 3.3V version for the same function. Even if he has to use the 5V part, we could check data sheet and see if Vih(min) specs are met.
Could you post a scope shot? There is certainly some 'confusion' around as to whether the Kinetis I2C pins, in 'open collector I/O mode', get clamped by a 'parasitic' high-side (undriven!) transistor. There is a statement that pins are 5V tolerant ONLY in 'input only' mode.
Thanks, I do know that pull-ups would be required. What I am really unsure of is whether the inputs would be pulled up to 5v or about 3.6v. Do these inputs have overvoltage protection that will prevent the inputs from maintaining 5v? This seems unclear to me. I have scoured the datasheets but still unsure.
There is no 'input protection' diode to VDD, BUT my expectation, given the item in the other thread by Derek Snell, is that the 'back biased diode' inherent in the pull-up transistor of the push-pull output structure is 'still there' even in open-collector mode (just never made active!), so THAT diode will clamp a bidirectional-I/O-mode pin to the rail. A proof picture would be nice -- but I don't have any 5V I2C busses. One other option for you would be an I2C repeater like PCA9509 or PCA9515...
Well I'm going to add a level translator to my prototype in case its needed. I will investigate and post the results back here. This will be in approx. 2 weeks.