帮助
英语（美国） | English (US) 日本語 | Japanese 中文 | Chinese (Simplified)

I have a batch of K10's that came "bricked", I have a I-Jet/IAR dev system. Anyone know how to erase memory? P/N MK10DN512VLK104N22D, lot

取消
开启建议
自动建议可通过在您键入时建议可能的匹配，而快速缩小您的搜索结果范围。
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

I have a batch of K10's that came "bricked", I have a I-Jet/IAR dev system. Anyone know how to erase memory? P/N MK10DN512VLK104N22D, lot

‎10-23-2014 12:12 PM
1,288 次查看
pgrosshart
Contributor I

@Have older boards that work fine, Here is a CSPY log of working board, then the bircked board:

oct 23/09:44:20.961 DEBUG2 :   

StartSession()

oct 23/09:44:20.963 DEBUG2 :    -> ConnectToHardware()
oct 23/09:44:20.963 DEBUG2 :       SigAPISetPath('C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\jet\bin')
oct 23/09:44:20.964 DEBUG2 :       SigProbe version: 1.30

oct 23/09:44:20.964 INFO   : Probe: Probe SW module ver 1.30

oct 23/09:44:20.964 DEBUG2 :       ISigProbe::EnumScan()

oct 23/09:44:20.971 INFO   : Probe: Found I-jet, SN=76341

oct 23/09:44:20.971 DEBUG2 :       scanning finished: found 1 probes
oct 23/09:44:20.972 DEBUG2 :    connection Serial No: 76341
oct 23/09:44:20.972 DEBUG2 :    connection found probes:

oct 23/09:44:20.981 INFO   : Probe: Opened connection to I-jet:76341

oct 23/09:44:21.018 INFO   : Probe: USB connection verified (7268 packets/sec)

oct 23/09:44:21.019 INFO   : Probe: I-jet, FW ver 4.2, HW Ver:A

oct 23/09:44:21.023 INFO   : Probe: None or IJET-MIPI10 adapter detected

oct 23/09:44:21.023 INFO   : Probe: Versions: JTAG=1.60 SWO=1.25 A2D=1.52 Stream=1.34

oct 23/09:44:21.023 DEBUG2 :       ISigAPI::CreateInstance('ISigEmu', 'EARM', '')
oct 23/09:44:21.023 DEBUG2 :    Core 0: sigEmu->LinkAttach(SigProbe)
oct 23/09:44:21.023 DEBUG2 :       core 0: IsigEmu::ParamSet('Emulator', 'ijet')
oct 23/09:44:21.023 DEBUG2 :       core 0: IsigEmu::ParamSet('Processor', 'Cortex-M4')
oct 23/09:44:21.023 DEBUG2 :       core 0: IsigEmu::ParamSet('JtagHeader', 'ARM-SWD')
oct 23/09:44:21.023 DEBUG2 :       core 0: IsigEmu::ParamSet('CoreSightSWJ', 'JTAG')
oct 23/09:44:21.024 DEBUG2 :       core 0: IsigEmu::ParamSet('JTagSpeed', 'auto')
oct 23/09:44:21.024 DEBUG2 :       core 0: IsigEmu::ParamSet('BoardCfg', '-auto')
oct 23/09:44:21.024 DEBUG2 :       core 0: IsigEmu::ParamSet('JtagInitDelay', '200,r:300')
oct 23/09:44:21.024 DEBUG2 :       core 0: IsigEmu::ParamSet('BigEndian', '0')
oct 23/09:44:21.024 DEBUG2 :       ISigEmu::LinkAttach('SigTerminalLog'...)
oct 23/09:44:21.024 DEBUG2 :    Core 0: sigEmu->LinkAttach(SigTerminalLog)
oct 23/09:44:21.024 DEBUG2 :       ISigProbe::AcquireInterface('ComProtocol')
oct 23/09:44:21.024 DEBUG2 :       core 0: IsigEmu::ParamSet('BoardDID', '')
oct 23/09:44:21.024 DEBUG2 :    Core 0: IceConnect(...)
oct 23/09:44:21.025 DEBUG2 :       ISigProbe::AcquireInterface('ISigXTrace')
oct 23/09:44:21.025 DEBUG2 :       ISigAPI::CreateInstance('ISigXTrace')
oct 23/09:44:21.026 DEBUG2 :       core 0: IsigEmu::ParamSet('BoardDID', '')
oct 23/09:44:21.026 DEBUG2 :       ISigEmu::IceInit(c), core named
oct 23/09:44:21.026 DEBUG2 :    Core 0: IceInit(...)

oct 23/09:44:21.026 INFO   : EARM v.3.61

oct 23/09:44:21.129 DEBUG2 :    ISigEmu::IceVersion(169)
oct 23/09:44:21.129 DEBUG2 :    ISigEmu::IceStatus(0)
oct 23/09:44:21.129 DEBUG2 :    Multi: AttachCpu 0
oct 23/09:44:21.129 DEBUG2 :       ISigProbe::CreateInstance(..., 'SigCmdInterpreter', '')
oct 23/09:44:21.130 DEBUG2 :       ISigCmdInterpreter::LinkAttach('ISigEmu',...)
oct 23/09:44:21.130 DEBUG2 :       ISigProbe::AcquireInterface('ISigA2D')
oct 23/09:44:21.130 DEBUG2 :       ISigA2D::LinkAttach('SigEmu',...)
oct 23/09:44:21.130 DEBUG2 :       ISigA2D::LinkAttach('SigTerminalLog',...)
oct 23/09:44:21.130 DEBUG2 :       ISigA2D::Init('null')

oct 23/09:44:22.122 WARNING: Warning: JTAG clock cannot be automatically determined. Set the clock manually.

oct 23/09:44:22.122 INFO   :      A default 9.6MHz is used.

oct 23/09:44:22.140 DEBUG2 :       ConnectToHardware(), checking status (#1): Core 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.158 DEBUG2 :       ConnectToHardware(), checking status (#1): Core 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.177 DEBUG2 :       ConnectToHardware(), checking status (#1): Core 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.177 DEBUG2 :       ISigXTrace::LinkAttach('SigTerminalLog',...)
oct 23/09:44:22.177 DEBUG2 :       ISigXTrace::LinkAttach('ISigXTraceClient',...)
oct 23/09:44:22.177 DEBUG2 :       ISigXTrace::LinkAttach('SigEmu',...)
oct 23/09:44:22.177 DEBUG2 :       ISigXTrace::LinkAttach('SigProbe',...)
oct 23/09:44:22.177 DEBUG2 :       ISigXTrace::Init('SWO,ETB')
oct 23/09:44:22.196 DEBUG2 :       ISigXTrace::TraceInfo(...) -> NULL (no trace)
oct 23/09:44:22.196 DEBUG2 :       ISigAPI::ReleaseInstance(sigXTrace)
oct 23/09:44:22.196 DEBUG2 :       ISigProbe::AcquireInterface('ISigSWO')
oct 23/09:44:22.196 DEBUG2 :       ISigSWO::LinkAttach('SigEmu',...)
oct 23/09:44:22.196 DEBUG2 :       ISigSWO::LinkAttach('SigTerminalLog',...)
oct 23/09:44:22.196 DEBUG2 :       ISigSWO::Init('')

oct 23/09:44:22.197 ERROR  : ISigSWO::Init() failed ; CPU does not have TPIU - no SWO

oct 23/09:44:22.197 DEBUG2 :       ISigProbe::AcquireInterface('ISigChan')
oct 23/09:44:22.197 DEBUG2 :       ISigChan::LinkAttach('SigEmu',...)
oct 23/09:44:22.197 DEBUG2 :       ISigChan::LinkAttach('SigTerminalLog',...)
oct 23/09:44:22.197 DEBUG2 :       ISigChan::LinkAttach('SigXTrace',...)
oct 23/09:44:22.197 DEBUG2 :       ISigChan::Init('null')
oct 23/09:44:22.197 DEBUG2 :       ISigChan::AcquireInterface('ISigChanReader')
oct 23/09:44:22.197 DEBUG2 :       ISigChanReader::GotoBegin()
oct 23/09:44:22.197 DEBUG2 :       ISigEmu::AcquireInterface('ISigEmuVect') (core 0)
oct 23/09:44:22.197 DEBUG2 :       ISigEmu::AcquireInterface('ISigEmuWpt')
oct 23/09:44:22.197 DEBUG2 :       ISigEmu::AcquireInterface('ISigPcSampler')
oct 23/09:44:22.197 DEBUG2 :    <- ConnectToHardware()
oct 23/09:44:22.197 DEBUG2 :    ->   LowLevelReset(hardware, delay 200)
oct 23/09:44:22.198 DEBUG2 :       core 0: IsigEmu::ParamSet('JtagInitDelay', '200,r:300')
oct 23/09:44:22.198 DEBUG2 :       core 0: IsigEmu::ParamSet('ResetStyle', 'HARDWARE')
oct 23/09:44:22.198 DEBUG2 :    Core 0: hardware reset
oct 23/09:44:22.708 DEBUG2 :    ->   LowLevelReset(): WaitForCpuResetToComplete(core 0)
oct 23/09:44:22.728 DEBUG2 :       LowLevelReset(): Core 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.747 DEBUG2 :       LowLevelReset(): Core 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.765 DEBUG2 :       LowLevelReset(): Core 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.765 DEBUG2 :    <-   LowLevelReset(): WaitForCpuResetToComplete(core 0)
oct 23/09:44:22.765 DEBUG2 :    <-   LowLevelReset(hardware, delay 200)
oct 23/09:44:22.765 DEBUG2 :    ->   StartSession(): WaitForCpuResetToComplete(core 0)
oct 23/09:44:22.784 DEBUG2 :       StartSession(): Core 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.802 DEBUG2 :       StartSession(): Core 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.821 DEBUG2 :       StartSession(): Core 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.821 DEBUG2 :    <-   StartSession(): WaitForCpuResetToComplete(core 0)
oct 23/09:44:22.840 DEBUG2 :    StartSession() checking powerCore 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.858 DEBUG2 :    StartSession() checking powerCore 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:22.877 DEBUG2 :    StartSession() checking powerCore 0: CpuStatus(status = <0x80: CPU_STATUS_MERR>) = 0
oct 23/09:44:26.181 DEBUG2 :    ********** 'Controlled' exception (1) caught in DbBeginSession
oct 23/09:44:28.239 DEBUG2 :    AboutToStopSession()
oct 23/09:44:28.254 DEBUG2 :    PrepareStopSession()
oct 23/09:44:28.296 DEBUG2 :    StopGui()
oct 23/09:44:28.304 DEBUG2 :    StopSession()
oct 23/09:44:28.306 DEBUG2 :    -> TerminateHardware()
oct 23/09:44:28.306 DEBUG2 :       ISigEmu::ReleaseInterface(pcSampler)
oct 23/09:44:28.306 DEBUG2 :       ISigEmu::ReleaseInterface(sigWpt)
oct 23/09:44:28.306 DEBUG2 :       ISigEmu::ReleaseInterface(sigVect)
oct 23/09:44:28.306 DEBUG2 :       ISigChan::ReleaseInterface(chanReader)
oct 23/09:44:28.306 DEBUG2 :       ISigChan::Term()
oct 23/09:44:28.306 DEBUG2 :       ISigA2D::Term()
oct 23/09:44:28.306 DEBUG2 :       ISigProbe::ReleaseInterface(sigA2D)
oct 23/09:44:28.306 DEBUG2 :       ISigEmuMp::DetachCpu(sigEmu) [core #0]
oct 23/09:44:28.306 DEBUG2 :    Multi: DetachCpu 0
oct 23/09:44:28.306 DEBUG2 :    Core 0: sigEmu->LinkAttach(SigProbe)
oct 23/09:44:28.306 DEBUG2 :       ISigEmu::IceTerm()
oct 23/09:44:28.307 DEBUG2 :       ISigApi::ReleaseInstance(sigEmu)
oct 23/09:44:28.319 DEBUG2 :       SigAPITerm()
oct 23/09:44:28.319 DEBUG2 :    <- TerminateHardware()
oct 23/09:44:28.319 DEBUG2 :    ~TdJetDriver()
oct 23/09:44:28.319 DEBUG2 :    -> TerminateHardware()
oct 23/09:44:28.319 DEBUG2 :    <- TerminateHardware()
标签 (1)
标签
0 项奖励
回复
3 回复数

‎10-28-2014 08:18 AM
944 次查看
pgrosshart
Contributor I

Okay - Got a Segger J-Link, and used the hard to find utility J Flash Lite. I was able to program the devices after they were unlocked by the program, first using Commander, then the Flash Lite. They worked. I-Jet *still* does not work. Has anyone see this?? Test I-Jet on old board to confirm it still works there.

0 项奖励
回复

‎10-23-2014 10:43 PM
944 次查看
Rick_Li
NXP Employee
NXP Employee

Hi Paul Groshart,

this issue should be caused by the low version of firmware of I-Jet.

the updating of firmware of I-jet can be done by updating your IAR to the latest version.

Since I-jet is from IAR company, I would also suggest contacting IAR support.

0 项奖励
回复

‎10-24-2014 06:36 AM
944 次查看
pgrosshart
Contributor I

I have a lot of new boards/chips, all fail. I have a board from last lot, works. Worked with older version and all new chips fail with Workbench and I-Jet updated. No design changes to PCB.

Is there a list of things that would cause this problem that are not the JTAG lines to the MCU?

0 项奖励
回复