How to configure SDHC module?

[neilporven]

​hi everyone,

I'm trying to configure the SDHC module, but I seem to be getting an ISR Default?

I Activated the clock gating, then I try to setup the PTE PORTS (0 - 5) and turn them to mux(4), but as I

step through the code, every time I step over PTE1 I get the ISR Default???

can someone explain how to setup the SDHC? Im not using PE and I would like to interface with an SD micro.

Thank you.

[neilporven]

Ok, so apparently I don't know how to use my scope......

The 80 SD-clocks are there, but If anyone see an issue with what I am doing above and possibly missing something please

add your comments.

[neilporven]

Ok,

So, I found out that, although, I would like to use the SDHC module and activating the clock gating for it like so:

// Enable Clock to SDHC

SIM_SCGC3 |= SIM_SCGC3_SDHC_MASK;

This is not the only thing that needs to be done!  The issue I was having when I tried to multiplex PORTE is because, I also needed to

activate the clock gating for PORTE like so,

SIM_SCGC5 |= SIM_SCGC5_PORTE_MASK;

Then I was able to multiplex the lines:

PORTE_PCR0 = PORT_PCR_MUX(4); //PTE0

PORTE_PCR1 = PORT_PCR_MUX(4); //PTE1

PORTE_PCR2 = PORT_PCR_MUX(4); //PTE2

PORTE_PCR3 = PORT_PCR_MUX(4); //PTE3

PORTE_PCR4 = PORT_PCR_MUX(4); //PTE4

PORTE_PCR5 = PORT_PCR_MUX(4); //PTE5

PORTE_PCR5 = PORT_PCR_MUX(4); //PTE6

Then I set the mode for the SD:

SDHC->PROCTL |= SDHC_PROCTL_DTW(0x01); //Data Transfer Width (01b 4-bit mode)

but, when I tried to do this:

SDHC->SYSCTL |= SDHC_SYSCTL_INITA_MASK; //When this bit is set, 80 SD-clocks are sent to the card

I don't see the 80 SD-clocks?  Is there some other register in/out of the SDHC that needs to be set?

Thank you.

[mjbcswitzerland]

Hi

You need to enable the clock in SDHC->SYSCTL (SDCLKEN) before clocks are sent when INITA mask is set.

Normally the 4 bit mode is set only after the initialisation sequence has completed and the bus width programmed in the SD card (bus width command CMD6).

Regards

Mark

Kinetis: µTasker Kinetis support

K64: µTasker Kinetis FRDM-K64F support  / µTasker Kinetis TWR-K64F120M support

For the complete "out-of-the-box" Kinetis experience and faster time to market

[neilporven]

Hi Mark,

It seems that SDHC->SYSCTL(SDCLKEN) is enabled from reset, either way I made sure to set it, it doesn't hurt:

SDHC->SYSCTL |= SDHC_SYSCTL_SDCLKEN_MASK; //Make sure SD Clock is Enabled

I am trying to figure out how to send a command, it looks like SDHC->CMDARG is the register I need, but how do I

give it say CMD0?  The short initialization/application note its not clear....

Thank you.

[mjbcswitzerland]

Neil

Yes, the clock is enabled out of reset. Since it needs to be disabled each time the speed is changed (eg. when moving from 400kHz to the final operating speed) it is generally re-enabled at similar code points. You may want to also check that you initially use the mandatory 100kHz..400kHz when sending the clocks and the first commands.

To send CMD0

- you need first to wait for the 80 clocks to complete (SDHC_SYSCTL_INITA_MASK is self-clearing and so can be monitored for this).

- Wait for idle line (using PRSSTAT).

- Write the argument to SDHC_CMDARG (0x00000000 in this case)

- Lauch the command by writing to XFERTYP (0x00020000) in this case

- Wait for the command to complete by monitoring IRQSTAT (CC wil be set to '1')

- Reset flags in IRQSTAT (for next use)

Then continue with the standard SD card initialisation sequence, including moving to 4-bit operating mode, followed by mouting its FAT.

Regards

Mark

[neilporven]

Thank you Mark, is there documentation on this (besides what is in the K64 Sub-Family Reference Manual)?

[mjbcswitzerland]

Neil

It is best to use the document in the Kinetis part manual together with reference code that already operates with the SDHC. Some details may need to be worked out with some trial and error - also read the chip errata since there tend to be a couple of SDHC issues to be aware of.

The SDHC layer is also only the lowest layer in the protocoll so you may need to study the SD group's Physical Layer specification and also FAT specification, assuming you need to work with the SD card as FAT.

- Freescale examples have SDHC driver and FatsFS.

- I use the uTasker SDHC driver and utFAT, which allows the SD card, SDHC and FAT operation to be simulated.

Regards

Mark

Kinetis: µTasker Kinetis support

K64: µTasker Kinetis FRDM-K64F support  / µTasker Kinetis TWR-K64F120M support

utFAT: http://www.utasker.com/docs/uTasker/uTasker_utFAT.PDF

For the complete "out-of-the-box" Kinetis experience and faster time to market

[neilporven]

Hi Mark,

Is there an issue using Freescale's SDHC driver and FatsFS?

Thank you,

Neil

[mjbcswitzerland]

Neil

I doubt that there is a problem since SDHC and FAT layers are usually totally independent.

Regards

Mark

Kinetis: µTasker Kinetis support

K64: µTasker Kinetis FRDM-K64F support  / µTasker Kinetis TWR-K64F120M support

utFAT: http://www.utasker.com/docs/uTasker/uTasker_utFAT.PDF

For the complete "out-of-the-box" Kinetis experience and faster time to market

[neilporven]

Thank you Mark.