Hi All, I'm using a FRDM-KL02z board for evaluation, and I would like to use I2C0 in slave mode while responding to two sequential addresses

[michaelgoudey]

I would like to configure the I2C0 port as slave and have it respond to two sequential addresses.  The range address match capability appears able to do this.  I would also like to differentiate between which register (A1 or RA) was matched.  The I2Cx_S[RAM] bit appears to offer this capability.  The reference manual states this bit is set if "Any nonzero calling address is received that matches the address in the RA register."  However, an interrupt seems to get generated for the address in the A1 register, not the RA register.  Can someone advise me on whether this I2Cx_S field can be used to differentiate between sequential slave addresses?

[Jorge_Gonzalez]

Hello Michael:

We are very sorry for the long time without attending your question. Are you still in doubt?

It should be possible to receive sequential addresses, but what for? a multi-master case maybe?

Address matching interrupts occur in either of the next cases:

1- Calling address matches with slave A1 address

2- Calling address matches with slave RA address

3- I2Cx_C2[RMEN] is 1 when calling address is more than A1 address and less than or equal to RA address.

And the status register (I2Cx_S) tells you what of the 3 cases happened. So, with this it should be possible to receive A1 and RA sequential addresses, but only one transmission/reception can occur.

Let me know if you need more details about this.

Regards,
Jorge Gonzalez

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[michaelgoudey]

Hi Jorge (and anyone else interested),

We have verified the behavior for KL02 slave I2C address matching.  It turns out range match must be enabled for I2Cx_RA to participate in the matching process.  That is, I2Cx_CR[RMEN]=1.  This means the I2C can match to multiple slave addresses, but they must be sequential.

Regards,

Michael Goudey

[michaelgoudey]

Hi Jorge,

Thanks for your response on this topic.  It so happens this is still an open item with the customer.  We were just discussing it about a week ago.

The actual setup with this customer is a type of virtual multi-master.  There is only one master but it could issue transactions on two addresses, such as 0xA0 and 0xA2.  The KL02 is configured as slave and it needs to respond to both addresses.  Therefore, the customer sets I2Cx_CR[RMEN]=0 and programs A1=0xA0 and RA=0xA2.  He finds an interrupt is only occurring on a match to the A1 register and not the RA register.  My interpretation of the manual is it should interrupt on a match to either slave address.  That is, I2Cx_S[IAAS] should be asserted and I2Cx_S[RAM] should reflect which address was matched.  However, this doesn't seem to be occurring.

Is this your understanding, and have you had a chance to verify the behavior when range address is used to match two distinct addresses, instead of a range (RMEN=0)?

Thanks, Michael Goudey