Hardware Watchdog ISR

[Oleksii]

Hi All,

May I kindly ask for an advice.

Working on HW Watchdog via LPO on MK20DN512VLK10.

WDOG_UNLOCK = 0xC520;

WDOG_UNLOCK = 0xD928;

WDOG_PRESC = WDOG_PRESC_PRESCVAL(0);

WDOG_TOVALH = (3000 >> 16);

WDOG_TOVALL = (4000);

WDOG_STCTRLH = 0x1D5

Please, advice the correct steps to add and configure IRQ function to be called when the watchdog timeout happens.

Thank you.

[mjbcswitzerland]

Hi

You just need to unmask the interrupt in the NVIC.

Here is the code from the uTasker project:

fnEnterInterrupt(irq_WDOG_ID, 0, wdog_irq); // enable WDOG interrupt (highest priority) and enter handler

static __interrupt void wdog_irq(void)
{
WDOG_STCTRLL = (WDOG_STCTRLL_INTFLG | WDOG_STCTRLL_RES1); // clear interrupt flag
*BOOT_MAIL_BOX = 0x9876; // set a pattern to the boot mailbox to show that the watchdog interrupt took place
}

Regards

Mark
[uTasker project developer for Kinetis and i.MX RT]
Contact me by personal message or on the uTasker web site to discuss professional training, solutions to problems or rapid product development requirements

For professionals searching for faster, problem-free Kinetis and i.MX RT 10xx developments the uTasker project holds the key

[Oleksii]

Thank you.

Kind of strange that I do not have this func in my repository.

fnEnterInterrupt is a part of some library ?

[mjbcswitzerland]

Hi

The function is use in the uTasker project to unmask interrupts and enter a user handler in the vector table (in RAM). You can work out the instructions from below and the complete Kinetis project is open source at this repository: https://github.com/uTasker/uTasker-Kinetis

Regards

Mark

// Function used to enter processor interrupts
//
extern void fnEnterInterrupt(int iInterruptID, unsigned char ucPriority, void (*InterruptFunc)(void))
{
    volatile unsigned long *ptrIntSet = IRQ0_31_SER_ADD;
#if defined ARM_MATH_CM0PLUS                                             // only long word accesses are possible to the priority registers
    volatile unsigned long *ptrPriority = (unsigned long *)IRQ0_3_PRIORITY_REGISTER_ADD;
    int iShift;
#else
    volatile unsigned char *ptrPriority = IRQ0_3_PRIORITY_REGISTER_ADD;
#endif
    VECTOR_TABLE *ptrVect = (VECTOR_TABLE *)VECTOR_TABLE_OFFSET_REG;
    void (**processor_ints)(void);
    processor_ints = (void (**)(void))&ptrVect->processor_interrupts;    // first processor interrupt location in the vector table
    processor_ints += iInterruptID;                                      // move the pointer to the location used by this interrupt number
    *processor_ints = InterruptFunc;                                     // enter the interrupt handler into the vector table
#if defined ARM_MATH_CM0PLUS
    ptrPriority += (iInterruptID/4);                                     // move to the priority location used by this interrupt
    iShift = ((iInterruptID % 4) * 8);
    *ptrPriority = ((*ptrPriority & ~(0xff << iShift)) | (ucPriority << (iShift + __NVIC_PRIORITY_SHIFT)));
#else
    ptrPriority += iInterruptID;                                         // move to the priority location used by this interrupt
    *ptrPriority = (ucPriority << __NVIC_PRIORITY_SHIFT);                // define the interrupt's priority (16 levels for Cortex-m4 and 4 levels for Cortex-m0+)
#endif
    ptrIntSet += (iInterruptID/32);                                      // move to the interrupt enable register in which this interrupt is controlled
    *ptrIntSet = (0x01 << (iInterruptID % 32));                          // enable the interrupt
}