I have a board design which incorporates a GPS receiver as a precision timing reference. The receiver produces a pulse at the start of each GPS second which is then followed by serial data which includes time and date. In my application code, I've configured a GPIO for input capture and see an interrupt on an FTM channel at each rising edge of the pulse from the receiver. I've also configured the same FTM to generate a timer overflow interrupt nominally once per millisecond. The interrupt handler updates the system time at each TOF interrupt, with the once per second pulse from the GPS receiver used to maintain long-term accuracy by compensating for oscillator error.
My algorithm design requires a 500 us offset between the 1 PPS signal and the internal clock in order to achieve +/-1/2 LSB timing accuracy. Ideal timing at the end of one GPS second and the start of the next is illustrated in the diagram below, where the top trace represents the 1 PPS signal from the GPS receiver and the lower trace TOF interrupts. Values in magenta represent time within the second in microseconds, while the numbers in orange below are cycle count values between events, i.e., FTMx -> MOD + 1. The FTM is configured for 50 MHz system bus clock value, prescale divide = 1.
Again, this is the ideal case. In practice, the last TOF interrupt before the input capture (1 PPS) event at the end of a GPS second may vary in time by as much as 20 us when the GPS is locked.
Quoting section xx.3.5 of the FTM section in the users manual,
"Writing to the MOD register latches the value into a buffer. The MOD register is updated
with the value of its write buffer according to Registers updated from write buffers.
If FTMEN = 0, this write coherency mechanism may be manually reset by writing to the
SC register whether BDM is active or not."
The manual reset capability described in the second paragraph is needed in order to change the modulus value in the input capture interrupt handler, as I essentially need to restart the internal time base at each 1 PPS event, with an initial delay value of 500 us (25000 system clock cycles). Despite the information provided about resetting the coherency mechanism, I've not found a way to make that work in practice. I've tried each of the following sequences. (Apologies for the formatting -- I see an icon for source code, but it appears to want to reformat my entire post and I didn't find any examples to show how a source code block should be included in the new user information.)
#define MODULUS_SYSTIMER_INITIAL 24999
/*
* Restart system timer, sequence 1
*/
FTM0 -> CNT = 0;
FTM0 -> MOD = MODULUS_SYSTIMER_INITIAL;
FTM0 -> SC != 1 << FTM_SC_TOIE_SHIFT;
/*
* Restart system timer, sequence 2
*/
FTM0 -> CNT = 0;
FTM0 -> SC != 1 << FTM_SC_TOIE_SHIFT;
FTM0 -> MOD = MODULUS_SYSTIMER_INITIAL;
/*
* Restart system timer, sequence 3
*/
FTM0 -> SC != 1 << FTM_SC_TOIE_SHIFT;
FTM0 -> CNT = 0;
FTM0 -> MOD = MODULUS_SYSTIMER_INITIAL;
/*
* Restart system timer, sequence 4
*/
FTM0 -> CNT = 0;
FTM0 -> SC &= ~(1 << FTM_SC_TOIE_SHIFT);
FTM0 -> MOD = MODULUS_SYSTIMER_INITIAL;
FTM0 -> SC |= 1 << FTM_SC_TOIE_SHIFT;
Implementing any of the sequences shown within the the input capture interrupt handler, I consistently see the first TOF interrupt occur 1000 us after the 1 PPS pulse. (As a diagnostic, I drive separate GPIOs high for the duration of each interrupt handler. Maximum time to service either TOF or input capture interrupts is 3.4 us, so there is ample idle time between events.)
It occurs to me that perhaps the problem is that the COUNT value is not being reset to zero as expected, even though the documentation claims that any write to FTMx -> CNT updates its value to that stored in CNTIN. As a final note, I'm using only the PTM functions, so TMEN and CNTIN are never altered from their reset values of zero.
If it's possible to restart the TOF timer as I need, I'm clearly not understanding the sequence of events needed to do so. If the documentation is in fact accurate, an example showing how to restart the timer as it appears possible would be most appreciated.
