Hello,My English is not good，please do not mind。my question ：
When I want to know how to use K64's SPI slave mode to receive data, because I need after receiving a byte of data, an interrupt is generated, and then sent to the master based on the results received, but I found that disabling the FIFO , still receives two bytes of data, I would like to ask why this is?
I am using the dspi_interrupt_transfer ksdk routine, his change to disable FIFO, the host sends two bytes, but I think in the case of a byte is received, the received data is then sent a second host sent out a byte.
Or who his impressions from the program, the grateful.:smileyhappy:
Hello,Thank you for your reply, I have found the cause of the problem, before the phenomenon: when I use is prohibited FIFO using single-step interrupt simulation in reading POPR register, the next step has been found that the next RX FIFO data frames, so I was suspected after disabling FIFO, also receives two data, but then found that, after read POPR register, RX FIFO is empty, but due to a single-step simulation time is greater than the read POPR register to receive the data next time, so to see the phenomenon after the read POPR, RX FIFO will have the next data immediately, this is a mistake on the operating result.
Finally, thank you for your help.:smileyhappy:
Hi yuanhan chen
Sorry if I misunderstood, Do you mean that you are receiving 2 bytes from the master? or that you are sending 2 bytes to the master when you receive 1 byte?
Could you share you project to try to find this issue that you describe?
Have a great day,