Ethernet Help wrote:
On the kwikstick schematic there is a signal named: JTAG_EZB_CS_b
I am not familiar with this signal.. should i connect it or not? If yes how?
As far as I can tell, that's not used by the J-Link.
But note that due to a design error, you can't debug external processors without a circuit change.
The problem is that with the ON/OFF switch in the OFF position, the K40 is not powered. Which isn't a problem for the JTAG lines, as they're 5-V tolerant and so don't interfere when the K40 is not powered.
However, the RESET line is protected by an internal diode to the K40's VCC line.
So you can't pull RESET high with the on-board J-LINK without adding a diode in series with the K40's RESET line (anode to K40 pin 74, and remove R113 (there is an internal pullup on /RESET in the K40).
As they say, "if it hasn't been tested, it doesn't work".