In the MKW41Z512 reference manual, in the chip configuration chapter it says: "The LPUART0 module RX and TX FIFOs are 8 entries each." However in the LPUART chapter bellow nothing is mentioned about the FIFOs. Also, judging from the drivers it seems that there are no LPUART FIFOs on board of the MKW41Z... Is the statement in chapter 3 wrong?
Thanks,
Paul.
Hi ppd and mjbcswitzerland,
MKW41Z512 (as well as MKW31Z, and MKW21Z) do have the FIFO. The depth is 8 data words. Some information was erroneously left out of the documentation. I have taken a note to update the reference manual.
You can check the reference manual for the KL28Z 72-96MHz to see the registers and their bit descriptions (on pages 819-822). That reference manual is located here: https://www.nxp.com/docs/en/reference-manual/MKL28ZRM.pdf . One thing to note is that this device includes registers that are not included on KW41Z/31Z/21Z, so the KW41Z register set will start at offset 0x10. To put that a little more simply, on KW41Z the LPUART_FIFO register is located at address 0x4005_4018 and the LPUART_WATER register is located at address 0x4005_401C (not at offset 0x28 and 0x2C as in KL28Z).
Hope this helps. Please let us know if you have further questions.
Regards,
Chris
Hi Paul
I believe that this is a documentation error since the KW41 has neither FIFO nor watermark registers. The KL28 and KE15 (maybe others) do have these registers in their LPUART implementations so presumably some LPUART documentation as been reused without erasing these points.
Regards
Mark
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