Does FTM output when timer is stopped go high impedance?

[jrychter]

What is the state of FTM output when using EPWM (FTM1_C0SC = (FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK)) and the timer is stopped using FTM1_SC &= ~FTM_SC_CLKS_MASK ?

It seems that the output goes high impedance, which I found unexpected and could not find described in the documentation. I expected the output to remain at the same level that it was just before the timer was stopped.

[xiangjun_rong]

Dear Jan Rychter,

I have tested the K40, if I enable the FTM and output PWM signal, then clear the CLKS bits in FTM_SC to disable the FTM, the FTM_CHx channel will be in HIGH IMPEDANCE state, the external pull up/down resistor will determine the pin logic state.

I tested it on TWR-K40x256 board and CW for mcu ver10.6.

I attach the code here.

void FtmPinassignment(void);

void PWMOutput_EdgeAlignment(void);

void stop(void);

void delay(void);

int main(void)

{

    int counter = 0;

    asm("nop");

    asm("nop");

    asm("nop");

    asm("nop");

    asm("nop");

    asm("nop");

    FtmPinassignment();

    PWMOutput_EdgeAlignment();

    FTM0_OUTINIT=0xFF;

    delay();

    stop();

    asm("nop");

    FTM0_OUTINIT=0x00;

    PWMOutput_EdgeAlignment();

    delay();

    stop();

    asm("nop");

    for(;;) {      

           counter++;

    }

    return 0;

}

void PWMOutput_EdgeAlignment(void)

{

    SIM_SCGC6|=0x03000000; //enable FTM0 and FTM0 module clock

        FTM0_CONF=0xC0; //set up BDM in 11

        FTM0_FMS=0x00; //clear the WPEN so that WPDIS is set in FTM0_MODE reg

        FTM0_MODE|=0x05; //enable write the FTM CnV register

        FTM0_MOD=1000;

        FTM0_C0SC=0x28; //edge-alignment, PWM initial state is High, becomes low after match

        FTM0_C1SC=0x28;

        FTM0_COMBINE=0x02; //complementary mode for CH0&CH1 of FTM0

        FTM0_COMBINE|=0x10; // dead timer insertion enabled in complementary mode for CH0&CH1 of FTM0

        FTM0_C1V=500;

        FTM0_C0V=500;

        FTM0_C2SC=0x28;

        FTM0_C3SC=0x28;

        FTM0_COMBINE|=0x0200;

        FTM0_COMBINE|=0x1000;

        FTM0_DEADTIME=0x00;

        FTM0_C3V=250;

        FTM0_C2V=250;

        FTM0_CNTIN=0x00;

        FTM0_SC=0x08; //PWM edge_alignment, system clock driving, dividing by 1

}

void stop(void)

{

    FTM0_SC=0x00;

}

void delay(void)

{

    int i,j;

    for(i=0; i<1000; i++)

    {

        for(j=100; j<100; j++)

        {

            asm("nop");

        }

    }

}

void FtmPinassignment(void)

{

    SIM_SCGC5=SIM_SCGC5|0x3E00; //enable port A/B/C/D/E clock

    PORTC_PCR1=0x400; //PTC1 in FTM mode    :FTM0_CH0:

    PORTC_PCR2=0x400; //PTC2 in FTM mode    :FTM0_CH1

    PORTC_PCR3=0x400; //PTC3 in FTM mode    :FTM0_CH2

    PORTC_PCR4=0x400; //PTC4 in FTM mode    :FTM0_CH3

    //PTD pins

    PORTD_PCR4=0x400; //PTD4 in FTM mode    :FTM0_CH4

    PORTD_PCR5=0x400; //PTD5 in FTM mode    :FTM0_CH5

    //PTA pins

    PORTA_PCR1=0x300; //PTA1 in FTM mode    :FTM0_CH6

    PORTA_PCR2=0x300; //PTA2 in FTM mode     :FTM0_CH7

    //configure PTB2 as FTM0_FLT3 as ALT6

    PORTB_PCR2=0x600;

    PORTC_PCR11=0x100; //PTC11 in GPIO mode and output mode

    GPIOC_PDDR=0x800; //PTC direction register, PTC11 is in output mode

    //in generally, PTC7 is in GPIO output mode, as an indicator to display if an ISR is executed

    PORTC_PCR7=0x100; //PTC7 in GPIO mode and output mode

    GPIOC_PDDR=0x80; //PTC direction register, PTC7 is in output mode

    //PTA6 is toggled by ISR of PIT1 module, which can be an  Fault or capture signal to test the Fault or capture function

    PORTA_PCR6=0x100; //PTA6 in GPIO mode and output mode

    GPIOA_PDDR=0x40; //PTC direction register, PTA6 is in output mode, PTA6 is pin5 of J4 on TWR-K40 board

    //FTM1 quadrature mode input pin configuration

    //PORTA_PCR8=0x600;   //PTA8 is the FTM1 quadrature signal input pin

    //PORTA_PCR9=0x600;   //PTA9 is the FTM1 quadrature signal input pin

    //PTB0  function as  FTM1_QD_PHA

    PORTB_PCR0=0x600;

    //PTB1 functions as FTM1_QD_PHB

    PORTB_PCR1=0x600;

}

[jrychter]

Thank you for your response. Do you have any suggested workaround that does not require an external resistor? I already have boards that do not have it, and the final design will be space-constrained, so I'd much rather not have it at all, if possible.

I am generating a series of precise pulses using the FTM (using DMA). Perhaps there is another way to halt the pulse generation without stopping the FTM clock? Or perhaps there is a way to keep the line low when the FTM clock is turned off?

As I understand, I could switch the pin to GPIO using the PCR register, and with pre-configured GPIO registers that would hold the line low after my pulses are done. But how do I *start* the transmission? I can see no way to switch the pin from GPIO to FTM and start the timer without introducing a race condition (pin becoming high-impedance for a moment).

Any suggestions would be very welcome.

[xiangjun_rong]

Hi, Jan Rychter,

If you do not connect external pull up/down resistor on PCB, and you want to have the PWM pin keep low so that the power device can turn off. I recommend you use mask function, when you mask the pin by writing the FTMx_OUTMASK register, after the mask function, the FTM_CHx pin logic is driven to low or high, which is determined by the bit in FTMx_POL register. For example, if the bit0 POL0 in FTMx_POL is cleared, after masking function, the FTM_CH0 will be driven to low. You can use software synchronization to make the mask feature function.

Pls refer to the an4560, which tell you how to use software synchronization to have masking feature function.

BR

Xiangjun Rong

[jrychter]

I had to do some work on this project again and actually tried to implement the OUTMASK scheme. Unfortunately, it doesn't quite work as I expected. The OUTMASK register has impressively complex synchronization patterns, but the one pattern I was looking for is missing: I wanted it to be synchronized just as CnV is. I wanted to mask the output before starting the timer, then unmask it when starting the timer without creating a race condition, and then mask it again before the timer is stopped.

It doesn't seem you can do that.

What I ended up doing is just switching the PORT MUX to GPIO before stopping the timer, and switching it back to timer functionality just before starting the timer. This does create a race condition (I switch the pin to FTM, but the FTM isn't running yet) when the pin might briefly float, but since it was grounded before, this doesn't seem to be a problem in practice.

In general, I think making the output float when the timer is stopped was a bad idea.

[xiangjun_rong · Accepted solution]

Hi, Jan,

Regarding the question how to implement the masking function, I suggest you read the an5142, which has the code to implement the masking function.

You can download the application note from the website:

http://cache.nxp.com/files/32bit/doc/app_note/AN5142.pdf?fsrch=1&sr=1&pageNum=1

Regarding your solution "I wanted to mask the output before starting the timer, then unmask it when starting the timer without creating a race condition, and then mask it again before the timer is stopped.", unfortunately, masking function can not function when the FTM is not running(I means the CLKS bit is zero). The masking function is valid only when the FTM is running by setting up the CLKS bit in NO_Zero value.

Anyway, connecting a pull up/down resistor is a good design for the PWM pins so that the PWM pin has a fixed logic after power up.

If you do not have a pull up/down resistor on PWM pins, setting up the PWM pin in GPIO output mode is okay as you have done. After the FTM is running, and output PWM signal by switching the pin from GPIO to PWM output mode, if you want to stop to output PWM signal, I suggest you just mask the PWM pin with masking function while the FTM still runs. When you want to output PWM signal again, just unmask the PWM pin, it is okay.

Hope it can help you.

BR

Xiangjun Rong

[jrychter]

Thank you — this is a very helpful suggestion!