DMA multi-channles interrupt issue

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DMA multi-channles interrupt issue

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daweiyou
NXP Employee
NXP Employee

Hi:

I have question for DMA milti-channel interrupt.

I have ch0 and ch1 for PDB-DMA-ADC-DMA-SRAM circle sampling project, which is OK alone.

another application is to use DMA ch14 and ch15 to complete UART tx and rx, rx is one byte DMA receive interrupt(for test).

these two projects are OK alone, but when they work together, they will conflict when testing.

I design one test case, PDB almost  60us once to trigger almost 8 channels ADC conv, after all channels completed, DMA0_ISR will be called to set DMA1_ERQ, which will allow PDB could trigger ch1 again next time. the code  like below.

void dma0_isr(void)

{

  DMA_ERQ |= DMA_ERQ_ERQ1_MASK; //置ERQ1的使能,通道1的使能

  flag++;

 

  DMA_CINT = 0x00; //clear int

  DMA_CDNE = 0x00; //clear done

}

UART isr continuely to tx and rx with PC, make sure the UART is busy.

Then after some time works successfully, the ch1 ERQ never be set again, but DMA0 INT also not set.

which means, the ADC circule is destroyed, and never recover.

I try to change channle priority or ECP and DAP for suspent channel, but not works, like that

        DMA_DCHPRI0 = 0x4E;

        DMA_DCHPRI1 = 0x4F; 

       

        DMA_DCHPRI14 = 0xC1;

        DMA_DCHPRI15 = 0xC0; 

I want to know, why the INT flag for DMA_CH0 dispears but the DMA_ERQ_ERQ1_MASK not set?

which should be completed in same ISR --- void dma0_isr(void), but from the debug view, the INT flag is cleared, but ERQ not set? seems which is not releatd with channels priority and arbitration.

Thx for your support.

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Dawei,

Have you tried to modify the DMA CH0 and CH1 priority setting with below code:

        DMA_DCHPRI0 = 0x0E;

        DMA_DCHPRI1 = 0x0F; 

And from you description, I learned the ADC circle as:

PDB-DMA(CH1)-ADC-DAM(CH0)-SRAM

For the PDB trigger 60us once, which seems trigger very frequency.

Can you extend the PDB trigger interval and if there will minimize the issue happen frequency?

And at DAM CH1 TCD setting, customer can clear DMA_TCD1_CSR [DREQ] bit and let CH1 ERQ bit always be enabled.


Wish it helps.
best regards
Ma Hui

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daweiyou
NXP Employee
NXP Employee

Hello Ma Hui:

thx for your reply.

(1)I ever adjust PDB to 120us, issue still occur, which seems not related wtih ADC dma channels itself.

(2)the priority setting is changed for different combination, not helpful

(3)clear DERQ, I know which will work, but there are one potenial risk. customer usr DMA isr to copy ADC data and do some other work.

    since in this testcase, the ERQ bit can't be set correctly, I am afraid this  DMA ISR is called. so user's operation will miss.

(4)BTW, I do some test again yesterday, I do not clear DONE bit in DMA ISR, I could find DONE is set after issue occur, but INT flag is cleared, and ERQ is cleared.

Which seems could prove that DMA ISR has clear INT flag, but ERQ bit is not  set succussfully, so next DMA service request is not started, and DONE bit stay set.

So the question will main focus on why ERQ bit is not set, even if I double confirm in DMA ISR. I can;t see some in Errata.

Could you confirm this or tell me where this issue maybe occur?

Many thanks for you.

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Dawei,

I checked Kinetis errata record, there is no related issue reported.

Could you check if there with code to using DMA_CERQ register clear ERQ bit in your project?

And which Kinetis product you are using?

If you could try below code to set DMA CH1 ERQ bit:

  DMA_CERQ = 0x1;

  DMA_SERQ = 0x1;

Wish it helps.
best regards
Ma Hui

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daweiyou
NXP Employee
NXP Employee

Hi Ma Hui:

Actually, one of my customer use K20DX128 72M product find this issue.

I have no this kind of tower board, so I tried to realized these function on K70 tower board.

Same test case, but not same coding, customer use DMA_SERQ = 0x1;

And I use DMA_ERQ |= DMA_ERQ_ERQ1_MASK, even I double check this bit is set before exit from ISR.

Which both could reproduce this problem.

If you are interesting in trying, I could send whole project to you.

Dawei You(尤大为)

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Dawei,

Yes, please send me the whole project.

I would do the test on my site.

Thanks.


Wish it helps.
best regards
Ma Hui

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daweiyou
NXP Employee
NXP Employee

Hi Hui:

I have post on

http://pan.baidu.com/s/1eQrIWUY

You could find project in below folder, and tested on TWR-K70, PLS use K70 project, for I have exclude some files in this project.

KINETIS_120MHZ_SC1\KINETIS_120MHZ_SC\build\iar\adc_demo

Dawei You(尤大为)

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