Well, I don't know what to tell you. Per the I2C standard, 'clock stretching' is strictly a function FROM a slave BACK to a master to 'pace' the transaction. Master-side I2C is, of course, totally 'in control' of its own pacing. Thus the I2C_LDD component doesn't enable 'clock stretching' as an option in master-mode.
I presume you are speaking of a mode where the Kinetis is an I2C slave. In that case, the 'clock stretching' is an automatic hardware function, where the clock line will be held after a byte is received until the I2C register has been cleared by firmware, thus making it available for the next byte to be clocked-in.