Cannot toggle over PTA3 in FRDM-KE02Z

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Cannot toggle over PTA3 in FRDM-KE02Z

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gschelotto
Contributor V

Hello,

 

I'm not able to do a toggle test over PTA3 in FRDM-KE02Z. I'm using KDS 1.1.0 with PE wizard support, removed R42 and populated 0R on R39 in the FRDM board to access the pin 20 (J2 header).

Also checked the pin directly in the microcontroller but it remains to zero. I've tested others pins with good results.

Can somebody help me with this issue?

I attach the KDS project for better understanding.

 

regards,

gaston

Original Attachment has been moved to: test.zip

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adriancano
NXP Employee
NXP Employee

Hi,


Sorry for the late answer, I was digging into the information in the Data sheet and the reference manual and I found some notes that confirm the Pull-up has no effect on the PTA2 and PTA3 pins.


The datasheet mentions that the PTA2 and PTA3 are true open drain I/O pins that are internally clamped to VSS. And to confirm this on the reference manual is mentioned that for port A pins that are configured as outputs or Hi-Z, this field (PTAPE2) has no effect.


I hope this information solves your queries.

Regards,

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adriancano
NXP Employee
NXP Employee

Hi,

I tested the same pin with the code you attached in two different FRDM-KE02Z boards and the pin toggle just fine. I did not remove the R42 and checked with the oscilloscope the output of the PTA3 pin (pin #47). I can say that there is not a software problem.

I believe that is possible that the pin was damaged with the soldered resistor; this is possible since these resistors are too close to the Microcontroller pins, check that possibility of a short between the resistors.


Hope this information can help you.

Regards,

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gschelotto
Contributor V

By the way, I think that FRDM-KE02Z User's Manual should report this issue to avoid confusion.

regards,

gaston

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gschelotto
Contributor V

Hi Adrian,

Thank you for your help. I've tested the code in another FRDM-KE02Z with the same hardware configuration and the problem persists. I've come back to the default hardware configuration (R42 & R45 placed in board) and surprise... it works!

Then I had the suspicion that PTA3 and PTA2 are configured as Open Drain. Indeed, I've checked the datasheet (p33 of MKE02P64M20SF0) and it's clear. Both pins are True Open Drain.

Is it possible to change the default configuration to Push-Pull? How? It seems that PE does not provide this option.

regards,

gaston

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adriancano
NXP Employee
NXP Employee

Hi,

It is good to know that is working now. You are right, the reason why this Pins are configured in open-drain when they are like an output is because they are used for the SDA and SCL of the I2C where is necessary to have the signals as output/input.

Indeed the normal LDD component for the Bit does not support the Pull enable functionality on the pin. The workaround that I can tell is to use an extra component: the Init_PORT component; this kind of components only generate an init() method for the modules but have all the configuration registers.

Check the image below to see how should be the Init_PORT component configured to allow the Pull functionality on a Pin. You can also write the line PORT_PUEL |= PORT_PUEL_PTAPE3_MASK; in your code in some part where PEx expert will not let you to write your code, if is in somewhere else PEx will erase that line every time you use the Generate Code button. I think is a better practice to add the Init_PORT component, since it is just one component to enable the pull-up to all the Ports.

init.png

:smileyalert:Also, you need to have in mind the note for the PTAPE3 that you can find in the reference manual:

    NOTE: When configuring to use this pin as output high for IIC, the internal pullup device remains activewhen PTAPE3 is set. It is automatically disabled to save power when output low.


Hope this information can help you.

Regards,

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gschelotto
Contributor V

Hi Adrian,

Any feedback from your side?

regards,

gaston

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adriancano
NXP Employee
NXP Employee

Hi,


Sorry for the late answer, I was digging into the information in the Data sheet and the reference manual and I found some notes that confirm the Pull-up has no effect on the PTA2 and PTA3 pins.


The datasheet mentions that the PTA2 and PTA3 are true open drain I/O pins that are internally clamped to VSS. And to confirm this on the reference manual is mentioned that for port A pins that are configured as outputs or Hi-Z, this field (PTAPE2) has no effect.


I hope this information solves your queries.

Regards,

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. It would be nice!

-----------------------------------------------------------------------------------------------------------------------

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gschelotto
Contributor V

Hi Adrian,

Thank you to clarify this. It solves my doubts about PTA2 and PTA3. Anyway I suggest to change the documentation to be more accurate i.e. to change 'True' open drain to 'Only'. For the marketing guys it may does not sound good but it's usefull for thechnicians :-)

Moreover, implementing UART TX/RX in an open-drain ports does not seem a good idea since you have to take into account some limitations like the slew-rate and power consumption. These limitations are well know for the I2C but not for UART.

regards,

gaston

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gschelotto
Contributor V

Adrian,

Internal pullup resistors configured by PORT_PUEL/H seem to have no effect for pins configured as outputs or Hi-Z. Could you confirm this?

I'm not able to toggle PTA3 yet (without external resistors).

regards,

gaston

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