Cannot enter EXAMPLE_DSPI_SLAVE_IRQHandler when debugging dspi_interrupt example

[kevinyuthermo]

Kinetis K64 dspi_interrupt example was compiled and debugged.

#define EXAMPLE_DSPI_MASTER_IRQHandler SPI0_IRQHandler

#define EXAMPLE_DSPI_SLAVE_IRQHandler SPI1_IRQHandler

One break point was set to EXAMPLE_DSPI_MASTER_IRQHandler.

The other was set to EXAMPLE_DSPI_SLAVE_IRQHandler

The physical pins are wired as example required:

DSPI_master -- DSPI_slave
CLK -- CLK
PCS -- PCS
SOUT -- SIN
SIN -- SOUT

EXAMPLE_DSPI_MASTER_IRQHandler break point was entered many times.

But EXAMPLE_DSPI_SLAVE_IRQHandler NEVER entered. Therefore the data tx and rx cannot succeed.

Why the slave interrupt won't work. How to debug this?

[gerardo_rodriguez]

Hello Kevin Yu,

I tested the dspi_interrupt example on FRDM-K64F and I'm able to enter both interrupts. 

Can you please verify your HW connections?

These are the board settings for the dspi_interrupt example:

==============
SPI one board:
Transfer data from instance0 to instance 1 of SPI interface.
SPI0 pins are connected with SPI1 pins of board
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
INSTANCE0(SPI0)     CONNECTS TO         INSTANCE1(SPI1)
Pin Name   Board Location     Pin Name  Board Location
MISO       J2 pin 10           MISO      J6 pin 6
MOSI       J2 pin 8            MOSI      J6 pin 7
SCK        J2 pin 12           SCK       J6 pin 5
PCS0       J2 pin 6            PCS0      J6 pin 4
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Let me know if you are still having issues.

Regards,

Gerardo

[kevinyuthermo]

Hi Gerardo,

Without changing any code, the slave interrupt break pint hits today.

But the data compare failed for master send and slave receive.

In the sample, master sends the 256 bytes data to slave, and slave read it. about half of the bytes received are incorrect. While slave sending and master receiving is correct.

Please let me know if anything I can try.

[gerardo_rodriguez]

Hi Kevin, 

Can you test the demo without any breakpoint enabled? If you have a breakpoint enabled in the slave interrupt, the SPI transaction may be affected.

I recommend viewing the SPI signals with a logic analyzer or oscilloscope to see if the data from the master is sent correctly.

Let me know your results.

[kevinyuthermo]

Without break points, the results are the same.

errorCount = 0U;
for (i = 0U; i < TRANSFER_SIZE; i++)
{
    if (masterTxData[i] != slaveRxData[i])
    {
        errorCount++;
    }

    // masterTxData is 255 bytes long with value from 0x00 to 0xFF

    // slaveRxData is wrong (first 127 bytes are 00, the rest 127 bytes are 80).

    if (slaveTxData[i] != masterRxData[i])
    {
        errorCount++;
    }

    // slaveTxData is equal to masterRxData, correct for this direction
}

Still wondering why Master send slave receive failed. (Checked the MOSI pin connection again)

[kevinyuthermo]

Hi Gerardo,

Good news is that everything works fine now.

The reason for the failure is that my SPI0 physically connected both slaves, SPI1 and AD7124. After unplug the core board, the MISO and MOSI can work as expected. 

Thank you so much along the road.

Kevin