I've just assembled a new board with a MK22FN128VLH10, and I'm trying to program it using a modified FRDM-K22F development board (SWD_CLK and SWD_DIO, as well as RESET carried over to programming header on new board).
I've successfully programmed one of the boards, which means the circuit / power etc. is at least designed correctly. I've put together the second board (identical to the first) but it refuses to perform a mass-erase from JLink (I'm using the OpenSDA Segger J-Link firmware on the FRDM board).
It will identify the device on the SWD bus, and displays the message saying the Kinetis device is secured, so I must perform a mass-erase to unsecure it. When I click yes, there is a pause of a few seconds, then JLink announces that there was a timeout while unsecuring the device. The log also has "Error while identifying Cortex-M core" after this, and when it tries to connect to the device via SWD.
I've tried probing the reset line when the FRDM board is disconnected, and I would expect to see it being driven low periodically as the Kinetis faults due to executing invalid instructions. However, the reset line stays high all the time, which seems like the Kinetis core is not actually running (which might explain why it cannot read the information from the Flash to identify the core, or issue the flash-erase commands).
Other things I've tried:
Any ideas on why the core isn't running and why I can't erase it?
Hi Jamie,
Are you using Kinetis Design Studio?
I would recommend you to first check the JTAG hardware circuit design, you can use the following document as reference, it has information about the connections of the 10/20-pin debug interface, we also recommend to connect the RESET pin to a pull up resistor of 4.7k - 10k and a 0.1 µF capacitor to VSS since this pin sometimes causes troubles if it is left floating.:
https://community.freescale.com/servlet/JiveServlet/download/546337-300774/Debug%20interface.pdf
Hope it helps!
Best Regards,
Carlos Mendoza
Technical Support Engineer