Hello,
I am using the NXP libraries to configure FTM1 on an MKV46F256VLL16 - but am getting a bus fault upon calling FTM_SetupInputCapture. This appears to occur during the read to the CnSC register for channel 2. Other registers and channels of the same FTM module are not affected. FTM_SetupInputCapture is called after FTM_Init, which enables the clock gates to the module. Note that the debugger is stopped due to a bus fault at FTM_SetupInputCapture below:

Inside FTM_SetupInputCapture:

The bus fault is marked as precise, and the BFAR is set to the address of FTM1 channel 2 CnSC, indicating that this is the access that caused the fault. Note that if the other FTM_SetupInputCapture line above was not commented out, the fault would still only occur when configuring the second channel.



My understanding is that reads of the CnSC register should be valid as long as the clock gate for FTM1 is enabled. I have also tried enabling the clock gate as shown below, and then reading the register - which also results in the same fault. This is done with interrupts disabled to eliminate the possibility of outside interference in the time domain. Any memory protection features remain at their default settings.

Any advice on how to address this issue would be much appreciated