Interrupts triggering without being enabled?

[raels-r]

After my previous question, I managed to access and view the NVIC register and unfortunately the rogue interrupts were not enabled, so I have no idea why/how their service routines are being accessed.

screen shot showing that TSI0_IRQHandler was called and, since undefined, went to DefaultISR, which endlessly loops.

Highlighted: TSI0 interrupt is disabled, so should not be firing.

USB0 and UART1 have also been firing, though those are also disabled.

Any insight into what might be causing this would be appreciated!

cheers,

Rael

[ZhangJennie]

Hi,

pls check the xPSR register in the debugger, the low 9 bits of xPSR register  points to the interrupt vector source. If the vector source is 3(ARM core hard fault), it is a bit complicated, because many causes can lead to the hard fault, for example, you select wrong chip in your project, you define a pointer without initialization, the pointer points to zero, which is flash address.... If the vector source is not 3, it is easy, you can get the vector source.

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[Alice_Yang]

Hello Rael,

In default , all of the interrupt are disable , have you disable or enable them by hand ?

Please show your code about how to initialize the UART and how to disable or enable them .

BR

Alice

[raels-r]

The interrupts are set using:

NVIC_ClearPendingIRQ(irq);

NVIC_EnableIRQ(irq);

Where irq is the enumerated irqn's defined in MKL25Z4.h rev2.5 ie/ "UART0_IRQn"

As I said, the registers suggest that none of the interrupts are enabled (their enable bits in NVIC are 0 when I checked in debugger).

There is no code to initialise UART_1 as it is meant to be disabled.

[Alice_Yang]

Hello Rael,

If we  not enable the interrupt , or  some incorrect operation ,  the interrupt can not occur in normal.

So if you are inconvenient for show your code , you can debug step by step to check when the interrupt bit be set .

Hope it the helps

Alice