FRDM K64F KDS PE SPI Clock Rate setting

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FRDM K64F KDS PE SPI Clock Rate setting

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brianmohlman
Contributor II

Hello All,

 

I am starting a project using the FRDMK64F board. I have the core clocking set for the max of 120MHz and I have added the fsl_Dspi bean to the project and when I try to set the clock rate I get:

 

Description Resource Path Location Type

Timing setting failed in Clock configuration 2 - it is impossible to set the following items: selected value (Clock rate) K64Test  spiCom1/Clock rate Processor Expert Problem
(I have attached a screenshot)

I have tried setting is to several different clock rates (2MHz, 6MHz, 12MHz, 20MHz) with the same result. .Anyone point me to what I am doing wrong?

 

Best Regards,

 

Brian

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Brian,

Just like I said to Justin below , delete the unused clock configuration from  cpu component .

Hope this helps.

Regards,

Alice

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hi,Brian

When you select spi clock ,firstly, you should look at your clock operating mode, if it is FEI mode , the max spi clock is 10.486MHZ.   which clock mod did you use?

Then , you can refer to the attachment choose the spi clock which you need.

clock_kds_pe1.png

while if your KDS isn't the latest edition, please  download and install from here: http://www.freescale.com/kds  The Kinetis Design Studio V1.1.0.

Hope this helps.

Regards,

Alice

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justinc
Contributor II

Hi Alice,

I'm having similar issues. I'm using the FRDM K64F and have set the clock, however I can not choose a clock source.

When I start a fresh project, I set the clock to FEI and then add the dspi module (high level). But I get the following error.

Screen Shot 2014-09-02 at 11.10.33 AM.png

I've noticed I dont have any SPI libraries. Only dspi stuff.

Cheers,

Justin

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hi Justin,

Can you  tell me  which KDS version did  you used?  If it isn't the latest version ,plesae  download and install the latest one.

http://www.freescale.com/kds!

Best Regards.

Alice

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justinc
Contributor II

Hi Alice,

I'm using KDS 1.1 and KSDK 1.0. I updated after seeing this post however it is still not working.

Cheers,

Justin

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liborukropec
NXP Employee
NXP Employee

Hello Justin,

if you have upgraded the KDS and in case you have two installations and using one workspace, check please main Processor Expert preferences (menu Edit | Preferences) and check whether the Processor Expert System directory is pointing to the latest kds location. You can check it also in the Processor Expert Console View, where are the other Pex console messages.

Simple solution to have default settings is to create new workspace.

Regards,

Libor

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justinc
Contributor II

Hi Libor,

I only have one installation of KDS, I uninstalled the original before I updated it.

Regards,

Justin

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hi, Justin

My KDS UI is different from yours, the attachment is my KDS version number ,(check version click :help->about Kinetis Design Stutio)

KDS version.png

Could you tell me if not use SDK, does spi clock work normally?

And if  convenient ,please send your project to me .

Best Regards

Alice

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justinc
Contributor II

Hi Alice,

I'm definitely using 1.1.1.

Screen Shot 2014-09-02 at 1.07.17 PM.png]

I'll message the project to you.

Thanks for the help,

Justin

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hi ,Justin

The attachment is your project I modify which Dspi clock can work normally , please check.

Hope this helps.

Regards,

Alice

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justinc
Contributor II

Hi Alice,

That worked but could you please explain what you did. I've been looking through the project and can't figure it out ?

Thank you,

Justin

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hi Justin

In the release notes: 

SDK components with timing item: Timing setting is validated according to all configurations in a CPU component.(ENGR00320699).

Workaround: Configure only 1 clock configuration in CPU component.


so ,I recommend to delete unused clock configurations from CPU component ,then   when configurate  fsl_dspi clock   ,all the default clock can choose.


Hope this helps.

Regards,

Alice

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piotrek
Contributor III

Hello Alice,

Similar problem with FRDM K64F, PE and UART. There is 5 clock configurations in the project: 0 to 4. The problem is with the clock configuration 3. How do I delete configuration 3 without deleting configuration 4?

I'm using KDS 1.1.1

Regards,

Piotr

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ChrisTango
Contributor IV

Hi Piotrek,

I've also a FRDM K64F and using UARTs as well. I've not the problem you are facing to.

This might help:

For the components you can select the used clock configurations, so you can select the clock configuration 0 rather than 4.

Best regards,

Chris

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justinc
Contributor II

Hi Alice,

Thank you for explaining that. It's helped quite a lot.

Kind regards,

Justin

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hi Brian,

The Kinetis Design Studio V1.1.1 released !

The new version V1.1.1 is available from the download area on http://www.freescale.com/kds!


Have a great day!

Alice

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brianmohlman
Contributor II

Alice,

             Thanks for the replies. I just loaded the latest KDS v1.1.1 and have the KSDK 1.0.0 GA loaded.. When I select the type of project (KDS with PE enabled) and I select the FRDM K64F board and the project loads. The SPI.LDD is no longer available, just the fsl.dspi. (As Jeff reported below) I have the MCU clock set up for maximum speed (120MHz for a data logger application) I also have it set for MCG PEE mode. The PLL is using the external extal input (which is 50MHz being fed from the output clock from one of the other ICs) Which is clock configuration 1. When I go into the SPI bean configuration the clock setting is not set, ,and the pins are not assigned. I correct the pin assignment and go to the clock rate dialog. The choice on the possible setting is ALL. If I choose a value for the rate, (say 5MHz) and press OK I get the error relating to the clock rate being impossible to set with configuration x (number depends on what clock rate I select). What is the max speed I can clock the SPI in PEE mode? I have chosen low rates (10KHz) to High rates. (10 MHz) with no success. I am using a KE06 board on another project and had no problems using the SPI.LDD version of the bean. Probably a KDS noob issue, but any help is appreciated.

Thanks for the Help!

Brian

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Brian,

Just like I said to Justin below , delete the unused clock configuration from  cpu component .

Hope this helps.

Regards,

Alice

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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dave408
Senior Contributor II

This worked for me as well, thanks!  I deleted all but configuration 0 and now the red X went away.  I still can't build the project, but that's another topic.

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello dave408,

You can say your  project's problem in detail  without hesitate, maybe i can help you, or maybe someone else can help you .

Alice

Best Regards

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dave408
Senior Contributor II

Thank you, Alice -- I'll definitely be posting in the near future in a new thread!

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