Dear Dong,
thank you very much for clarification.
My question is: When VDD is powered off and VBAT is powered on, after pulling up the INT pin with VBAT, can the INT voltage be lowered when the timed alarm interrupt arrives? Can you confirm this? Can we also disable the interrupt output corresponding to VDD/VBAT switching by configuring it? Thank you for your prompt reply.
[A] Yes, this is possible. Please refer to the section 7.9 in the PCF85263A datasheet. You can set, what will generate interrupt. It makes no difference if the PCF85263A is powered from VDD or VBAT.


If you want to disable the interrupt when the PCF85263A is powered from VDD, then you can disable the interrupt in the registers.
To check if the PCF85263 is powered from VDD or VBAT can be by INTA pin.

However if you will use the INTA for battery mode indication, then you cannot use it as the INTA output. You can use the INTB pin instead.
With Best Regards,
Jozef