Question about dual-bank memory. MC56F84763

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Question about dual-bank memory. MC56F84763

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fasihahmed
Contributor IV

the flash memory is 128kB of dual-bank memory.

Does this means since now there are two separate parts, my code size will be max 64kB? or is possible to join them together to have a single code size around 128kB.

How would the booloader be different when compared to a single bank memory?

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9 Replies

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Lorenzo_Mch_IT
Contributor IV

Hello fasihahmed,

The "dual bank" feature in MC56F83xxx devices has been added to allow writing to half of its flash memory while the other half holds the current running program.

The main differences between MC56F84xxx and MC56F83xxx (about flash memory mapping) are:
1) MC56F84xxx has a  single "program/data flash" bank of up to 256KByte (128KW) and a second "data flash of up to 32KByte (16KW) mapped in two non-contiguous blocks of memory addresses.

2) MC56F83xxx has a single 32KB "boot rom" (containing a configurable bootloader) and two contiguous banks of "program/data flash".

On MC56F84xxx you can use the "data flash" to store a custom bootloader, so you can rewrite the "program/data flash" bank at runtime (i.e. to upgrade application firmware, etc.), but while you do it the "application firmware" can't run.


The MC56F83xxx has no separate "data flash" block, but instead its "program/data flash" is split into two consecutive banks, so if you don't want to use the "standard" boot rom and you want to manage firmware updates on your own, you can write to one bank of flash while your code is running in the other bank.

That is, you can execute your application code in  the first half of program/data flash while incrementally writing to the second half (or run code in the second half and incrementally rewrite the first half) so you don't have to stop application firmware execution while you do the incremental upgrade.

As an added bonus, if your application code is small enough to fit in half the flash memory, you can keep the currently running code in the first half, incrementally write the upgraded code (compiled to be mapped in the first half) to the second half and then "flip" the base address of the two banks by setting a configuration register and do a soft reset to switch from the "old" code to the upgraded one.

Besides this, if you don't have to keep the application running while upgrading, you can just use both flash banks to hold your application code and constant data and use the boot rom for "offline" upgrades.

For more details look into MC56F83XXXRM.pdf at:

Chapter 4 - Memory Map  (where there is a comment about "bank swapping")

Chapter 20 -
     sections
     20.4.1    Program flash memory swap (more details about about "bank swapping")
     20.4.6    Read while write (RWW)
     20.4.8.3 Allowed simultaneous flash operations

Chapter 6 - Rom Bootloader (explaining what you can do with the "standard" bootloader)

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9711929255
Contributor I

Hi Rong

Can you please let me know if you have any Art Cortex microcontroller that is having Dual Bank?

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2,164 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Fasih,

Pls download them from the link:

Performance Level Digital Signal Controllers, USB FS OTG, CAN-FD | NXP 

BR

XiangJun Rong

2,164 Views
fasihahmed
Contributor IV

Thanks.  xiangjun.rong

Can you be able to explain the meaning of dual-bank partition flash memory. I am new to this microcontroller family. 

What are the advantages of using it? And do i need to configure anythign to be able to use the whole 256KB of flash for one big code image?

question for nxp 2.PNG

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Fasih,

I do not think the MC56F83xxx has dual-bank concept, pls refer to the screenshot. In other words, the primary program/data flash array1 and primary program/data flash array2 are continuous, you can save your large code to the two arrays which are total 128KW(256KB). Furthermore, you do not need to configure anything.

Hope it can help you

BR

Xiangjun rong

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2,164 Views
fasihahmed
Contributor IV

Hey Thanks for reply, could you also give the same explanation regarding the newer generation family MC56F83763 (128KB)?

Why does this say dual-bank and not the older generation of MCF84xxx series?  ZhangJennie  xiangjun.rong

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Fasih,

Pls refer to the Chapter 19 in UM of MC56F847xx,the bank1 is FlexNVM, in other words, the bank1 is 16KW Secondary (boot) program/data flash memory , which can be mapped to both program space and data space.

Hope it can help you

BR

XiangJun Rong

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2,164 Views
fasihahmed
Contributor IV

xiangjun.rong

This information is for UM of MC56F847xx.

But I would like information on UM of MC56F837xx. (from new generation).

Can you send me link for this UM of MC56F837xx?

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2,164 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Fasih,

I think you misunderstand the dual-bank concept foir the MC56F84xxx. As you know that the MC56F84xxx has Primary program/data flash, program/data RAM,secondary(boot) program/data flash memory.

The following fig is the memory map for MC56F847xx.

memory type                                                                              size                         address

Primary program/data flash                                                 128KW                 P:0x00 0000 - 0x01 ffff

Secondary (boot) program/data flash memory                  16KW                 P:0x06 8000 - 0x06 bfff

Program/data RAM                                                                   16KW                P:0x06 0000 - 0x06 3fff

The Primary program/data flash from P:0x00 0000 - 0x01 ffff are BANK0, Secondary (boot) program/data flash memory from   P:0x06 0000 - 0x06 3fff are bank1. So they are NOT consistent, they are independent. The Secondary (boot) program/data flash memory can be used boot memory and data memory.

Hope it can help you

BR

XiangJun Rong

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