MC57F82748 ADC offset

[PHXFAE]

My customer discovered an issue with the MC56F82748 processor that they are using.  When they probe the input pin on the microcontroller, we see an offset of 40 mV between the value the multi-meter reads vs the voltage the ADC peripheral provides.  The offset is consistent as we change the input voltage, but there is no information in the datasheet about a voltage offset.  Is this something they should be seeing and is there a spec for this.

[PHXFAE]

For some reason, I don't have access to say that this is closed now or that a correct answer has been given.  The customer has decided to use the offset registers to solve this issue.  Thanks for you help.

[PHXFAE]

Thanks John.  I will pass this by my customer and see if I can get the schematic if this is not solved.

[mohammad_kamil]

Hi Alex,

Can you please check following

1. If VREFH and VREFL are at same potential as VDDA and VSSA if they are selected as ANB2/ANA2 or ANB3/ANA3.

2. Is there any impedance between VSS and VSSA, have you placed any bead inductor in VSSA bath to isolate it from VSS? VSS and VSSA should be shorted and have common ground plane.

3. Can you please share  shematic around ADC pins.

4. ADC peripheral has ADC_OFFSTn registers. have the offset value in these registers to eliminate any hardware/software offset in result (ADC_RSLTn) registers.

[PHXFAE]

Hi Kamil,

Thank you for the suggestions and questions. I will ask the customer for the schematic and what else may be in the circuit. Can you please explain number 1 below. I don’t understand what you mean. Is this a question or a suggestion? Can you please explain that a little more?

Thx, Alex

[johnlwinters]

1. If VREFH and VREFL are at same potential as VDDA and VSSA if they are selected as ANB2/ANA2 or ANB3/ANA3.

This means if VREF is selected as external, then you must make sure that the external VREFH matches VDDA, and that the external VREFL matches VSSA.

If internal VREF is used, it is not needed to check as these are inside the device.

[PHXFAE]

Hi John,

I was not sure how to insert this into the thread so hopefully this works. Please see the customer response and schematic below.

We are using VDDA and VSSA as the voltage reference high/low. We did use a bead inductor in the VSSA path to isolate it from VSS.

We also performed voltage clamping between VDDA and 3.3V.

[johnlwinters]

Try removing the bead and the clamp (if possible) to see effect on offset.