I have a problem with interfacing a dualuart ic (EXAR XR68C192) with the MCF5280. The dualuart requires a minimum time of 100ns between to asserted chip selects.
I´ve found the option to insert wait states (chip select control register), but this leads only to a longer chip select assert time but not a longer deassert time.
I still run this workaround with NOP´s but I would like to know if there is a possibility to enlarge the timing between two CS´s with register settings of the external bus.
Well, I don't know much about MCF5280 or its EIM, but one way of solving the problem would be to wrap accesses to the XR68C192 in assembly language subroutines and supplying enough NOPs to ensure long enough CS deassert time.
