VDDA, VSSA, VRH and VRL left unconnected

[MatthieuSIMON]

Hello everyone,

I'm currently designing a board using a Coldfire MCF52259.

I want to use the port PAN[7:0] as GPIOs, thus I won't deal with the ADC module at all.

My question is, can the pins VDDA, VSSA, VRH and VRL be left unconnected/not routed on the PCB ?

Or do I need to tight them to some potential like VCC/GND ?

Thank you !

Matthieu

[TomE]

Tough question. I thought this one would be easy to find an answer to, but there's nothing in the Data Sheets or Reference Manuals. Searching for "unconnected" and other keywords in this forum doesn't find anything useful either.

I guess I could say you have to obey the Minimum and Maximum Ratings for these voltages in the Data Sheet, and that maybe you can't guarantee to meet these specs if those pins are gloating.

From a practical standpoint, "floating" is always bad. You may also be straying into a region of operation the designers haven't considered or tested.

The best answer for this is "design your board as close to the reference design as possible". That design is well tested, supported and understood. Do anything different at your peril.

Tom

[MatthieuSIMON]

Right, there's nothing written about that anywhere.

Floating is not always bad, it really depends of the implementation and pin usage.

Well, to be sure of my design, I will just connected them to MCUs VCC/GND without decoupling ...

But I let the question open if someone as a finite answer.

Thanks

[scifi]

Matthieu Simon wrote:

Well, to be sure of my design, I will just connected them to MCUs VCC/GND without decoupling ...

I'm not sure that the 'without decoupling' part is such a good idea. Some of the MCU's I've seen draw power for the PLL from VDDA (same pin that powers ADC).