We are working on a design using the MCF5329. For cost reasons, we want to use 16-bit SDR DRAM. For layout and design reasons, we'd like to use the 'Split Bus' mode to keep the SDRAM bus separate to other peripherals on the Flex Bus. The documentation is slightly confusing as to whether SDR SDRAM can actually be used in Split Bus mode:
The DRAMSEL signal (which selects 32bit shared or 16-bit split bus modes) is described as selecting either '32-bit shared bus SDR mode' or '16-bit split bus DDR mode'.
Meanwhile, Bit 29 in the SDRAM Control Register (SDCR) appears to actually control if the SDRAM signals operate in DDR or SDR mode.
All reference designs seem to use either DDR SDRAM in split bus mode or SDR SDRAM in shared bus mode. We assume that if the DRAMSEL signal is set for 16-bit split bus mode and the SDCR register is
configured for SDR mode that SDR SDRAM can be used successfully in 16-bit split mode however, before committing to this in our design we'd like to know if this is correct and if anyone else has tried using this configuration?
