Simple timer problem

[kylestew]

This one is so easy that no one has ever asked it!
I am trying to setup a timer that I can use to find the time elapsed in my code. I want to call a method to start the timer and then call a method to stop and return elapsed time. I have this to work except I can't get the timer to interrupt on overflow. This limits my timing ability.
I am using M5211DEMO board. Here is my code:

Code:

__interrupt__ void TimerOVF(void) { // Clear timer interrupt flag MCF_GPT_GPTFLG2 = 0  | MCF_GPT_GPTFLG2_TOF;  // Increase overflow count overflow_count++; }  /******************************************************* StartTimerStarts a GPT running with an interrupt for overflow.*******************************************************/void StartTimer() { overflow_count = 0;  // Set GPT0 to output compare MCF_GPT_GPTIOS = 0  | MCF_GPT_GPTIOS_IOS0;   // Output compare on GPT0 pin MCF_GPT_GPTOC3M = 0x01; MCF_GPT_GPTOC3D = 0x01;   // Disable toggle-on-overflow (all channels) MCF_GPT_GPTTOV = 0x0f;  // No pin output on output compare MCF_GPT_GPTCTL1 = 0;  // Disable input capture (all channels) MCF_GPT_GPTCTL2 = 0;  // Install ISR in the exception table mcf5xxx_set_handler(64 + 41, TimerOVF);   // Enable interrupt MCF_GPT_GPTIE = 0  | MCF_GPT_GPTIE_CI0; // GPT0   // Enable timer overflow interrupts MCF_GPT_GPTSCR2 = 0  | MCF_GPT_GPTSCR2_TOI // interrupt on overflow  | MCF_GPT_GPTSCR2_PR_1; // prescaler = 1   // Clear timer interrupt flag MCF_GPT_GPTFLG2 = 0  | MCF_GPT_GPTFLG2_TOF;   // Enable the GPT MCF_GPT_GPTSCR1 = 0  | MCF_GPT_GPTSCR1_GPTEN  | MCF_GPT_GPTSCR1_GPTEN;     // Enable interrupts in the interrupt controller MCF_INTC_IMRH &= ~(0  | MCF_INTC_IMRH_MASK41);         // Set the CPU to allow interrupts mcf5xxx_irq_enable();}

 Any help would be greatly appreciated
Thanks all

[kylestew]

Looks like it is working now. I added a small slice of code to get it rolling.

Code:

 // Set the interrupt priority and level MCF_INTC_ICR(41) = 0  | MCF_INTC_ICR_IL(3)  | MCF_INTC_ICR_IP(3);     // Enable interrupts in the interrupt controller MCF_INTC_IMRL &= ~(0  | MCF_INTC_IMRL_MASKALL); MCF_INTC_IMRH &= ~(0  | MCF_INTC_IMRH_MASK41);