Regarding QSPI interrupt based sampl code for MCF5282 controller

[nilesh_khunte]

Hi,

I am using MCF5282 Evaluation board for development

1)      I am writing a SPI interrupt based driver for MCF5282 controller I have read similar article for –Pooling based SPI driver on the Freescale forum.

             How do I write the interrupt based SPI driver for MCf5282? Please provide the sample code. That would help me to understand it in better manner

2)      I guess in MCf5282 ,Only transmit interrupt is present in QIR register(SPIF flag-0th bit)-QSPI finished flag

Set on completion of the command pointed by QWR[ENDQP].ie Each time the end of queue is reached QIR[SPIF ] is set .and if interrupt service is used the service routine must clear QIR[SPIF] to abort the current request .Additional interrupt requests during servicing can be prevented by clearing QIR[SPIF]

Does it have receive interrupt as well? If no then how do we make sure that data is received correctly after transfer

Please provide the sample code.

Regards

Nilesh

[TomE]

Have you searched this board for "QSPI"? There are a lot of previous posts. Some of them might help you or provide links to sample code.

Have you used the higher level search - searching Freescale for QSPI? There are a lot of old App Notes available.

Cue Mark Butcher and uTasker:

http://www.utasker.com/

"The µTasker supports specific network enabled processors and is free to use in educational, hobby and other non-commercial projects.". It has code to run the QSPI parts.

Are you "Educational or Hobby"?

> and if interrupt service is used the service routine must clear QIR[SPIF] to abort the current request

No aborting necessary. The interrupt service routine has to SET (write one to) QIR[SPIF] to clear it. That's all it has to do. Then it can load the next command (or set of commands) into the queue.

I can't give you my code as it belongs to the company I work for, but the basic approach is to:

0 - Initialise the part, including setting QIR[SPIFE] AND setting up the interrupt controller properly,

1 - Load up the queue with commands and data

2 - Write to QDLYR[SPE] as the last thing, this starts the transfer.

3 - Wait until the interrupt happens, then

4 - Read the results out of the queue for the previous transaction

5 - Go back to step 1.

We use it through an address decoder to get to three CAN parts and an ADC on the SPI bus. We used to "launch" 11 ADC conversions in the one command (where each conversion needs 6us to complete), but the 70us that took added too much latency to the CAN service code.

> Does it have receive interrupt as well?

No. The QSPI only operates in Master Mode, so all SPI reception is driven by the transmission. Bits shift in and out at the same time. For ADC chips, a series of conversion commands are written, and you read back the results of conversion "N" while sending the command for conversion "N+1". So the data is available at the end of a transmission.

Tom

[nilesh_khunte]

I tried to search the sample code for interrupt based QSPI driver but unable to get it.

I have got the sample code which is based on polling.

It would be a great help if could help me in getting the interrupt based code for MCf5282

Meanwhile i will try to serach again for the interrupt based QSPI code

[TomE]

Have you looked at uTasker? If not, then please say why not. If you're not Commercial then this working code is free. If you are Commercial, then how much is your time worth? uTasker is cheap.

Freescale supports programming their chips with "CodeWarrior" and  "Processor Expert". The latter is a commercial product that sets up the pins and the peripherals for you.

http://www.freescale.com/webapp/sps/site/homepage.jsp?code=BEAN_STORE_MAIN&fsrch=1&sr=2

However (and this does surprise me a bit) the "Embedded Components Comparison Table" on the above page lists "Support for interrupt pins and interrupt vector table" as being there for MCF51, but NOT for MCF52, 53 or 54.

Do you have the interrupt controller set up for any other peripherals? Enabling interrupts (and setting the vector) is the same for QSPI. Just cut-and-paste and change the numbers.

Changing Polling to Interrupt code is as simple as setting the interrupt enable bit and then handling the interrupt.

Another problem (with sample code) is that nobody should be running their code completely "naked" on the hardware. You need some form of OS or library functions. Every OS or set of library functions (or even compiler) provides a different interface for setting up the interrupts. Any sample code should be written for a specific OS model. If I sent you our QSPI code you couldn't use it because it uses functions provided by our interrupt handling system, which wouldn't match yours. That's a real reason for there being no interrupt driven general sample code.

Tom