Problem with access error

[JOA2]

Hi.

I am working with COLDFIRE 5475 and PEMICRO emulator and MMU is disable?

I want to write code to handle an Access error exception.

I have use a code to write data to an address with no memory:

*(short*)(0x40000000)=123;

When I get this code. Emulator send me an error and I can´t  get exception code.

If I put a break point  in exception code (access error) It never stop at this point.

With other exceptions like div by zero ,I have not porblem?

Does any one that is happening?

Thank you.

[TomE]

The only "access errors" I can see listed are in Table 5-2 of the MCF5485 Reference Manual.

It looks like most of them are from Memory Management or "Protected Space".

I don't think you'll get "access errors" just by accessing "memory that isn't there". Old CPUs (68000, PDP-11 :smileyhappy: used to have this very useful feature, but I've never found anything on the Condfire series to do that. The MCF5329 I'm familiar with has two "Bus Monitor Timers" that can trigger on accesses to unallocated SCM address space, but that only traps accesses to a 127k out of the 4G address space, or about 27 in a million possible bad addresses.

If you want traps to unmapped memory I think you're going to have to turn the MMU on and program it properly.

Tom

[JOA2]

Thank you Tom.

I worked with 68332 and it generates this exception.

I was confused. I have started to read MMU and probably it will be my solution, but 

manual is fairly dificult to understand and there is not any example.

Does anyone know were can I find any example to work with MMU or more documentation?

Than you 

Oscar

[TomE]

> I worked with 68332 and it generates this exception.

Me too.

Do you NEED to trap bad addresses? There are only so many points in your code where it should be possible to generate a "bad pointer" and you could add explicit tests (for null pointers etc) before dereferencing them.

It is nice when the CPU can trap these bugs and print on the console (usually) where it was when you made the mistake, but the chip makers don't seem to talk to the programmers any more. All you're left with is programming the Watchdog to reset the CPU out of these situations, and "the watchdog doesn't leave any tooth marks". What was a 1 minute fix can now take a week adding breakpoints or print statements, trying to home in on the bug.

Being able to debug your code should be part of the CPU silection, If it doesn't support trapping bad addresses, don't use the chip.

> I have started to read MMU and probably it will be my solution,

MMUs are big and ugly, and you don't want the complexity unless you really have to, or unless the CPU forces you to. For instance the MPC series doesn't provide any way to have cached and uncached memory (the IO registers) without turning the MMU on. The MMU handling code in the product I worked on took over a YEAR to get working properly!

The MMU needs a table describing all of your memory, and then SOFTWARE has to handle the traps and reload

the TLBs. It isn't simple. On some CPUs the debug registers can be pressed into service to trap accesses in certain ranges. See if they're flexible ebough on your CPU.to trap "access between end-of-ram and start-of-io-page" for instance.

> Does anyone know were can I find any example to work with MMU or more documentation?

Linux, but that is extremely complicated and anything but clear.

Tom