PSC on MCF5485

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PSC on MCF5485

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Radek21
Contributor I
Hello everybody,
I have new board phyCore5485. Now I'm trying to send and receive data to/from UART via Multichannel DMA. Sending data is working well, but I have trouble with reception. Whenever I launch the MCD_startDma function (from freescale API), the DMA interrupt is invoked immediately and RX buffer contains only one received byte.

Here is part of my code:

MCD_initDma ((dmaRegs*)(MBAR_ADDRESS+0x8000),(void *)(MCDAPI_ADDRESS), MCD_COMM_PREFETCH_EN | MCD_RELOC_TASKS);

dma_irq_enable(UART_DMA_INTERRUPT_LEVEL,UART_DMA_INTERRUPT_PRIORITY);

MCD_startDma(
0, // channel
(u8*)&MCF_PSC_RB(portNumber), // source addr
0, // source increment
_buff, /destination addr
1, // destination increment
(u32)(_size), // size
1, // Xfer size
4, // initiator PSC0 Rx
6, // priority
MCD_SINGLE_DMA | MCD_INTERRUPT, // flags
MCD_NO_CSUM | MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV );


I have really no idea where could be a problem.

Can somebady help me?

Cheers Radek

Message Edited by Radek21 on 2009-01-19 01:36 PM
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Dave_SC
Contributor I
Hi Radek,

First let me say that I am not a serial guru. 

I am not exactly sure what your problem is by the way you phrased the question.  Is your problem:
a) You receive a garbage byte after starting the interrupt, and then all subsequent bytes are good?
b) You receive all garbage bytes after starting the interrupt?
c) That all bytes received are good but that you want to receive more than 1 byte per interrupt.
d) Something else entirely. :smileywink:

Can you be more specific with your question?

Cheers,
Dave

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Radek21
Contributor I
Hi Dave,

thank you for your response.


What I really do?

- I start DMA channel 0 (MCD_startDma - see above) for reception of e.g. 100bytes.
- Some data are received.
- DMA interrupt is invoked - all DMA transfer should be completed.
- But Rx buffer contains only 1 byte from the Rx FIFO instead expected 100 bytes.
- In FIFO is at the moment all remaining received bytes (except already read 1 byte).
- The RXRDY bit from SR register is still set and the RFCNT register shows correct number of remaining bytes in FIFO.
- Whenever I start DMA channel again, next 1 byte from FIFO is transfered to buffer.

Data in the FIFO are good. But I'm not able to start DMA transfer for more than just 1 byte.

Cheers Radek

Message Edited by Radek21 on 2009-01-26 03:10 PM
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Radek21
Contributor I
Yeah... I found it.
The PSC was set wrong (parity was multidrop addr) :-/

Bye.
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