MCF5329/mDDR SDRAM

[avm_ace]

Hi,
We are planning to use the MCF5329 along with the mobile DDR device MT46H8M32LF in our board. But we are confused as to how to use the multiplexed DQS pins for strobing the data. The memory device has 4 DQS pins. So do we need to have any demultiplexing done before interfacing the pins with the memory?

Any help is greatly appreciated.

Thanks & Regards,
avm_ace

[w_wegner]

Hi,

in DDR mode, the MCF532x memory controller only supports a memory bus width of 16 bits, because the device is in non-shared mode.
So, simply use the MT46H16M16LF instead, and the problems are gone. :smileywink:

(I have this mDDR connected to a MCF5373L myself, which is sufficiently similar because it has the same memory controller.)

Regards,
Wolfgang

[avm_ace]

Hi,
      I think I should have to go for your suggestion. Thanks for the information. But there is also another issue to be addressed. All the data transfer is done as 32bits in our application. So, if we are going for a x16 device, then we need to have 2 of them to meet the storage requirement. So, kindly tell me whether there's any signal integrity issues to be addressed when the address and data buses are shared between two such devices. AFAIK, mDDR devices are suited for point-to-point applications. So will there be any issues while using multiple devices?

Thanks and regards,
avm_ace

[w_wegner]

Hi,

don´t worry about the software data sizes - in case the memory (and/or FlexBus) controller is correctly configured for the device attached, the physical data size is completely transparent.

With the 16-bit mDDR connected to the memory controller and the controller set up correctly for DDR operation and non-shared bus, the device shows up as a contiguous 32MB memory region. (As the device in our "example" is of size 256MBit.) The actual transfers to and from the SDRAM are done in bursts anyways, so there are always more than 32 bits transferred in one burst, all this is also handled transparently by the cache logic.

The only place where you may have to take care is when you use the FlexBus to support several different data sizes (8 and 16 bit mixed in this case, 32 bit is only possible in shared bus mode with SDR-SDRAM devices). Depending on the hardware and setup, you then have to take into account reading on even or odd addresses only and then assembling the values yourself - but again, this is only necessary when the physical data size of the device is not matched to the bus size the controller is configured for, everything else is handled by processor-internal logic transparently.

Hope to help,
Wolfgang

[avm_ace]

Hi,
Do you have any idea as to how much current is consumed by MCF5329's SDVDD lines when it is powered by 1.8V for driving the LPDDR interface?

Thanks and Regards,
avm_ace

[avm_ace]

Hi,
Wow!!! Now I'm confident enough to go ahead with my design as such.

Thanks again for the help,
Regards,
avm_ace