MCF5328 running very slow

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MCF5328 running very slow

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dn_engineer
Contributor I

We are facing a problem that our MCF5328 system runs very slow, slower than our old MCF5272 system.

I did a simple while loop test with long integer calculation as following on both MCF5272 system and MCF5328 system.

One cycle takes MCF5272 system 65ms while MCF5328 system takes 83ms. That doesn't make sense, MCF5272 is V2 core and runs at 48MHz, MCF5328 is V3 core and run at 80MHz/240MHz.

 

The SDR SDRAM that we are using is 48LC8M16A2 -7E, run at 16 bit mode. And I checked the configuration, everything is correct.

 

Anybody know why?

 

while(1)

{

for (i=0; i<0x7FFF; i++)
{
         temp_long = para_long*i + para_long*para_long*i + para_long*para_long*para_long*i +   para_long*para_long*para_long*para_long*i;
         temp_long *= temp_long;


      }

*(char *)0xFC0A4003 = toggle_bit;//toggle a I/O bit
      toggle_bit = 1 - toggle_bit;
   }

 

 

Thanks for your help.

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dn_engineer
Contributor I

Hi Tom,

 

Thank you very much for your suggestion. I enabled cache and put the stack in internal SRAM as you suggested. Since our hardware design is done with 2 16 bit SDRAM using as 32 bit SDR SDRAM, I am not sure if they will design a new board with 16-bit DDR. I read your notes on the reset problems, so far we haven't saw that problem yet.

 

I have another problem that may be you can help. We are using 2 16 bit flash memory parallel as a 32-bit device. I have difficulties to read the memory IDs. For the two flash memory, we connect the address lines start from A2 to A23, the data bus use D0-D15 for the lower one and D16-D31 for the upper one. I can read out the device ID and manufacturing ID if I read as unsigned short (16-bit), but with long word read which 32-bit bus should do, I always get 0xFFFFFFFF. I setup the chip select 0 (flash memory) to 32-bit port size. 

 

   unsigned long manufacturer_id, device_id;

   *((unsigned long *)FLASH_ADDRESS + 0xaaaa) = 0x00aa00aa;
   *((unsigned long *)FLASH_ADDRESS + 0x5555) = 0x00550055;
   *((unsigned long *)FLASH_ADDRESS + 0xaaaa) = 0x00900090;
  
   manufacturer_id = *((unsigned long *)FLASH_ADDRESS);
  
// 32 bit: two 16 bit flash   
   *((unsigned long *)FLASH_ADDRESS + 0xaaaa) = 0x00aa00aa;
   *((unsigned long *)FLASH_ADDRESS + 0x5555) = 0x00550055;
   *((unsigned long *)FLASH_ADDRESS + 0xaaaa) = 0x00900090;

   device_id = *((unsigned long *)FLASH_ADDRESS + 0x1);

 

Do you have any idea what the problem may be? Thank you very much.

 

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dn_engineer
Contributor I

I think I found the problem. The address is shifted 1 bit. So it should be:

 unsigned long manufacturer_id, device_id;

   *((unsigned long *)FLASH_ADDRESS + 0x5555) = 0x00aa00aa;
   *((unsigned long *)FLASH_ADDRESS + 0x2aaa) = 0x00550055;
   *((unsigned long *)FLASH_ADDRESS + 0x5555) = 0x00900090;
  
   manufacturer_id = *((unsigned long *)FLASH_ADDRESS);
  
// 32 bit: two 16 bit flash   
   *((unsigned long *)FLASH_ADDRESS + 0x5555) = 0x00aa00aa;
   *((unsigned long *)FLASH_ADDRESS + 0x2aaa) = 0x00550055;
   *((unsigned long *)FLASH_ADDRESS + 0x5555) = 0x00900090;

   device_id = *((unsigned long *)FLASH_ADDRESS + 0x1);

 

Thanks.

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TomE
Specialist II

Well found.


That will get more complicated when you try to program the chips.

 

I would suggest you don't write your final code with "magic numbers multiplied by 2" as you have done, but try to abstract the chip interface from the arrangement on the board.

 

According to the data sheets, the chips are 16 bit data addressed as 16 bits with specific offsets (0xaaaa, 0x5555) for specific functions. Your board changes this, having one chip on even-by-two and one chip on odd-by-two addresses with the ability to read (and possibly write) 32 bits at a time.

 

So it would make the code clearer if you wrote a function that you pass the address (as per the data sheet) and chip number and have it convert to the proper address and an upper-word read or write as appropriate. This could easily be a macro. This would allow access to the two chips as separate devices. This would be OK if you are using the chips as a file system and not trying to run code from it.

 

But you probably have to boot from the FLASH, so you want a way to read the data 32-bits wide, and probably write it the same way.

 

For programming you have the option of erasing and programming each chip separately or writing code to program them at the same time. This is a bit tricky as you have to read the status from both chips and wait until the LAST one finishes, and also handle any errors in either or both. It may be simpler to program them one-at-a-time if you're not time-constrained (as this will take twice as long).

 

???? How much faster did your test code run with the cache on?

 

Tom

 

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dn_engineer
Contributor I

The speed is 9s with cache enabled vs 24s with cache disabled.

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