MCF5307, strange vector 63 (reserved) interrupt

[angelo_d]

Hi all,

i am testing u-boot bootloader with this cpu, it works quite fine, but after some time (between half an hour and 2 hours) i get a misterious interrupt 63, followed then by a vector 4 exception:

[code]

amcore$
Bogus External Interrupt Vector 63


*** Unexpected exception ***
Vector Number: 4  Format: 04  Fault Status: 0

PC: 00ff26be    SR: 00002004    SP: 00ed8a60
D0: 0000000c    D1: 00000002    D2: 00000008    D3: 00000008
D4: 00ed8aec    D5: 00ed8ae8    D6: 00ff

*** Unexpected exception ***
Vector Number: 4  Format: 04  Fault Status: 0

PC: 00fe9d36    SR: 00002700    SP: 00ed8808

[/code]

I am wandering what interrupt 63 is, something undocumented since it is reserved and there is no lecterature that talk about it.

every help is appreciated,

thanks,

angelo

[TomE]

Check SECF180 in the latest errata. The symptoms there don't match what you're seeing, but make sure you're following the guidelines for changing the CPU interrupt level to "7" before making any changes to any of the IMR registers.

Make sure you're not doing this:

Reference manual:

9.2.1 Interrupt Control Registers (ICR0–ICR9)

NOTE:
Assigning the same interrupt level and priority to multiple
ICRs causes unpredictable system behavior.

EITHER set the "autovector" bit in the ICR registers for your interrupts or make sure you program correct interrupt vectors (for instance in the UIVR registers for the UART. You should probably use vectors for all internal devices and Autovector for any interrupt pins.

Simplify your testing. Turn things off until the problem goes away, then focus on the thing that seems to be related to the problem.

Good luck,

Tom (A Random Poster)

[angelo_d]

hi TomE,

thanks again for your support.

I will certainly follow your suggestions, but before that, seems i have issues with the SDRAM initialization.

To be sure the issue is there, i am executing some code now ONLY from the nor flash, and wait some days, then i will confirm issue is about the SDRAM initialization / executing from SDRAM.

Probably these issues can change with bursts/cache enabled or disabled, but is possible there is something wrong in the SDRAM initialization sequence.

Also, since i copied this sequence from somewhere, from examples i am quite sure was working, and since my board is a prototype, is possible i have some soldering issues that can introduce this bad behavior sometime only.

I can also have some power supply spykes on 3.3V or other issues.

I will proceed step by step and let you know the progresses,

regards,

angelo

[angelo_d]

Hi TomE,

i am proceeding slowly, since this project has a low priority, but these are the progresses:

1) excluded SDRAM, running u-boot bootloader from the parallel nor flash, exception 4 (illegal instruction) still happen.

2) excluded u-boot code and cache, running in a loop a basic 3 lines assembly code, executing from flash, exception still happen, inside 1 hour (debugging using parallel port / leds).

So seems the issue happen only sometime, inside one hour, and is not related to sdram. So i am suspecting now about a bad design, or some poor soldering in the address or data bus, something that make the cpu to read a bad opcode.  Also maybe a non perfect power supply, but this is really difficult, or some drift in the clock ...

still investigating

regards,

angelo

[angelo_d · Accepted solution]

hi,

seems i solved also this last "stability" issue.

The board is a prototype assembled here, refreshing some soldering on the data bus and cleaning wery well seems solved the issue.

Until now, after 36 hours, no exceptions detected.

thanks TomE,

regards