Is MCF5282 QAdC module works fine only for reference voltage of 5V ?.
I have connected analog supply of 3.3v to VDDA and VSSa and reference voltage levels are also connected to 3.3v(VRH) and 0v(VRL). it's not working. Result registers are not updating when the analog input is varying. Registers are updated either with 0 or 0x3FF. (Register value is 0 if the voltage is below 3.3 and 0x3FF for above 3.3. )
pls suggest me
I'm surprised there isn't a smoking crater in the middle of the chip.
> I have connected analog supply of 3.3v to VDDA and VSSa
Your problem is obvious, but you might have spotted it if you read through the User Manual where it says:
Table 33-10. QADC Electrical Specifications (Operating)
(VDDH and VDDA = 5.0 Vdc ± 0.5V, VDD = 2.7-3.6V, VSS and VSSA = 0 Vdc, FQCLK = 2.0 MHz, ...
Table 14-3. MCF5282 Signals and Pin Numbers Sorted by Function (continued)
R5 VDDA — — Analog positive supply I —
P5:T1 VSSA — — Analog ground I —
Vdd is always the Supply Voltage pin.
Vss is always the GROUND voltage pin.
The history of the naming convention is described here:
http://en.wikipedia.org/wiki/Vdd
Exactly analogous conventions were applied to field-effect transistors with their drain, source and gate terminals.[1] This led to VD and VS being created by supply voltages designated VDD and VSS in the more common circuit configurations.
Tom
Is MCF5282 QAdC module works fine only for reference voltage of 5V ?.
I have connected analog supply of 3.3v to VDDA and VSSA to 0v.
Reference voltage levels are also connected to 3.3v(VRH) and 0v(VRL). it's not working. Result registers are not updating when the analog input is varying. Registers are updated either with 0 or 0x3FF. (Register value is 0 if the voltage is below 3.3 and 0x3FF for above 3.3. )
pls suggest me
Did you connect "3.3v to VDDA and VSSa" or did you make a mistake in your question?
If you did connect VSSA to 3.3V then the chip might be damaged. So did you do this or not?
> Is MCF5282 QAdC module works fine only for reference voltage of 5V ?.
Have you TESTED it at 5V? Does it work at 5V (Vssa and Vref both connected to 5v)? Does it STILL work at 5V if you connected VSSa to 3.3V? Do you know it works at 5V or are you making a guess at the problem. I can't tell that from your post.
Section "28.9.2 Analog Power Signals" give good details on how the circuit works and what will go wrong if the different voltages are set at the wrong levels.
Can you check all QADC voltages close to the chip? There may be a hardware fault, bad connection or PCB error. Is it a Development board or your own board? Can you test a known good development board at 3.3V?
The Data Sheet says the MCF521x QADC only runs at 4.5 to 5.5V but the MCF528x is meant to run at 3.3V to 5.5V. Are you sure you don't have an MCF521x chip there?
Tom
I have my own MCF5282 target board in which VDD,VDDA, VRH and VDDH are connected to 3.3V and VSS, VSSA and VRL are connected to 0v. Analog Input channels are conneted to QB0 and QB1.
QADC module is configured as below.
MCF5282_QADC_CCW(0) = 0x0240; //QB0
MCF5282_QADC_CCW(1) = 0x0241; //Qb1
MCF5282_QADC_CCW(2) = 0x003F; //End of Queue
MCF5282_QADC_DDRQA = 0x0;
MCF5282_QADC_DDRQB = 0x0;
MCF5282_QADC_QADCMCR = 0x0080;
MCF5282_QADC_QACR0 = 0x0024; // fsysclk = 73.73Mhz(Tested with different presclaer values.)
MCF5282_QADC_QACR1 = 0x1E00;
MCF5282_QADC_QACR2 = 0x007F;
When I read the result registers(RJURR(0), RJURR(1)) after Queue completion flag is set, the value is 0 when the analog input is below 3.3v and 0x3ff when the analog input is above 3.3v respectively. Result registers are not updating when the analog input is varying. Even for the channel numbers 60(VRL), 61(VRH), 62((VRH-VRL)/2), the result registers are showing some random values.
Its not working.
I have checked the voltage levels. all are fine.
or else i have to connect the VDDA, VRH to 5v and VSSA ,VRL to 0v?(As per MCF5282 user manual table 33-10, 33-11, QADC characteristics are GUARANTEED only for 5v and we can use QADC module at lower voltage only as GPIO.)
Please clarify
Hi,
The settings and operation on this ADC is a little bit tricky, I also had some problems as you; first start the configuration by forcing QADC to idle state: MCF5282_QADC_QADCMCR=0x8000;
-then perform some dummy operations:
MCF5282_QADC_DDRQB=0x0; MCF5282_QADC_PORTQB=0;
-then re-enable QADC and continue the configuration.
Take care about queues, try to use first only Q1. Also note you set the QADCMCR to operate from supervisor mode; if this is what you need then only from supervisor you can read the results.
Regards,
Ipa
> As per MCF5282 user manual table 33-10, 33-11,
Yes that table has "Note 1: QADC converter specifications are only guaranteed for VDDH and VDDA = 5.0V +/- 0.5V. VDDH and VDDA may be powered down to 2.7V with only GPIO functions supported.".
So it looks like that chip isn't suitable for your use. Maybe you need to use a chip from a different family. Or manufacturer.
I'm disappointed in Freescale for having such a strange restriction, and then apparently only documenting it in a note at the bottom of one table in the User Manual. There's nothing in the "Chip Features" at the front of the manual, and not a mention in the QADC chapter of this restriction. It seems the only way to find out about this is to build a product and have it not work, as you have done.
Tom