> CCE Bit 14
> In the reference manual for the MCF52259 family (section 13.3.4),
What version of the manual? I've got Rev 3 and Rev 4 and neither of them have a "USB END" bit documented in that section.
The Revision History Appendix documents a change to the CCE between Rev 0 and Rev 1 - are you looking at a Rev 0 manual?
Searching the forum for "BDT Endian" finds your last post on this subject on 8 November.
I can find reference to "USB Endian" control in MPC parts (ES in MPC5125), and also in the "USB Mode" register in the USB controller in the MCF5329. That controls the byte order for DMA transfers, but says it has to be set to "1" (big endian) for "proper operation", to match the CPU.
I'm comparing the USB register sets in the MCF5329 and MCF52259. They're nothing like each other. The MCF5329 one is documented as an EHCI controller, and it matches the registers in the Intel EHCI specification. But what is the MCF52259 one? It doesn't seem to match either the EHCI or OHCI specifications. Is it some sort of "device-end" USB controller that can be persuaded to do some host-end work?
Tom