Hi
1) When using USB it is important to use a 48MHz crystal (or 48MHz clock source). This is the only way to achieve the USB jitter specifications. There is no reason to use USB_ALTCLK since the main crystal clock is adequate.
2) The system clock can be set to 80MHz (PLL) by using DIV = 6, MUL = 1.
3) When using UARTs the 115200 Baud that can be obtained from the internal Baud-rate generators is 113'636 (-1.5%). If this accuracy is not adequate a system clock setting of 76.8MHz [DIV = 5, MUL = 8] allows 114'285Baud (-0.8%) to be achieved
4) It is very important to put 100nF and 10nF decoupling capacitors in parallel as close as possible to the PLL power supply pins to achieve reliable PLL operation.
5) It is advisable to put resistors in series with port lines - especially if they have long connections on the board. Even of the port is not switching, the line can carry high frequencies originating from within the processor. If the port is not driving current, resistances of 1k close to the chip stops potential EMI.
Regards
Mark
www.uTasker.com- OS, TCP/IP stack, USB, device drivers and simulator for M5221X, M5222X, M5223X, M5225X. One package does them all -
"Embedding it better..." Message Edited by mjbcswitzerland on 2009-03-21 10:44 AM