5235 QSPI ADC timing issue

[mcf5235]

All,

I am trying to interface an xternal ADC to the QSPI of the MCF5235 running at 150MHz clk. It seems to be having some timing issues. If someone is wrking on the same kind, can you please let me know how I can get this pblm resolved. Is there any example to look at?

Thankyou

-Sreekar

[stzari]

Hi,

could you be a little more specific ?
What kind of timing issues do you have ? Do you get any data at all ? How is your QSPI configured ? etc...
Without those informations any answer has to be very general.
The example at the end of the QSPI chapter in the MCF5235 Reference Manual is a good starting point.

HTH
Stamatis

[mcf5235]

Hi,

In the eg on the 5235RM....

After selecting the command RAM, a total of 16 values(4 for each of the 4 chip selects) are written into the QDR.

Now, after selecting the Tx RAM, sixteen 12-bit words are written.

Can you please explain what is done here exactly. I mean what data is written?

Am just using one external chip(ADC) for the interface. So, do I need to send the same data to the command and transmit RAMs 16 times each time i request a transfer.

Thanks a lot in advance

-Sreekar

[Kremer]

 Hi Sreekar

 You can use the command ram for 16 command words (16 bits) for one single chip select too, not limited to share it to others chip selects. It´s specified by your QMR configuration.

 A total of 16 words (16 bits) of data can be written to data tx ram. Basically you´ll need the same ammount of words on data tx ram as you have on the command ram.

 After setting commands and tx data, you´ll need to configure the wrap register QWR to the mode you want. Then you´ll be able to start a SPI transmission. When the transmission is finished, the SPIF will be set and you´ll know it already finished. Clear this flag by writing a 1 to SPIF bit or you´ll no be able to start a new transfer.

 Read process is simple. You know how much bits you need to read, so setup the command ram to send data and setup de data ram with 0x0000 words and reconfigure the QWR as you wish, then start a SPI transfer. The 0x0000 data is to set the SDO line low while you are emmiting the SCLK pulses for the slave AD. After this procedure finishes (look for the SPIF again) you´ll be able to read the data from the read ram, wich has a total of 16 words of data to be read.

 Hope this helps.

 Cheers

[mcf5235]

Hi Kremer,

Thanks a lot for the info. tht helped me clear off some dbts, but am unable to get the data into the processor. even on the scope. here is the code i used to interface MAX1202 with the mcf5235 . can u see if there is some blunder am doing??? especially timing..!!!

thanks a lot in advance.

-sreekar

[stzari]

Hi Sreekar,

I think that you are still far away from needing to care about timing.
A quick look into the MAX1202 data sheet (pg. 13) shows that you need a transfer of 3 Bytes (maybe later of 8 control and 12 databits) with CS kept low during the transfer.
A first glance at your code (without having checked any of the data you write) shows that you try to set up 2 different accesses.
You will have to set up multiple transfers over the QSPI (using multiple entries in the command RAM).
You will also have to set CS0=0 if there is no inverter on your board ...

I think that you should check ALL signals with a scope and compare the results with the required states.

HTH
Stamatis