MC56F84 Code from RAM

[thomaschiantia]

Hello,

The MC5684 processor has 256K Flash, 32KB "Data Flash", and 32KB RAM.  I'm looking for relative appnotes or startup files/Linker scripts to describe copying code from ROM into RAM and then executing from RAM memory in hopes to get more processor bandwidth (and avoid wait states). My application would modify the interrupt controller to the new interrupt vector base address. The Codewarriror suite supports "Large data memory model configuration" and "Small Data Memory model configuration", but no "RAM" configuration for this chip.   

In brief, an example of what I'm looking for in the Freescale DSC is something like this:

http://www.ti.com/lit/an/spraau8/spraau8.pdf

-Thomas

[TICS_Fiona · Accepted solution]

I copied my reply to a SR for this question as below:

We have some constants and initialized global data in ROM and copy them to RAM when DSC startup, please refer to section "7.2.8" for how to implement it in Link Command File:

http://cache.freescale.com/files/soft_dev_tools/doc/ref_manual/CWMCUDSCCMPREF.pdf

In fact, when creating a new project from a new bareboard for 56F84xxx, this code for ROM to RAM copying is already included in link command file.

Hope this helps!