"Device Protection Error" when flashing MCF5475EVB boot flash

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"Device Protection Error" when flashing MCF5475EVB boot flash

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DavidHearn
Contributor I
I'm using CodeWarrior 6.3 Special Edition and have used the stationary to create a basic application for the MCF5475EVB. I've selected the M5475 ROM target and built it successfully. In the flash programmer tool, I've loaded the config for this board, verified that the settings appear correct, and then tried clicking Program. The process starts and I see the following messages:

Performing target initialisation
Downloading flash device driver
Initialising
Downloading xxx bytes (more flashes up quickly)
Error: Program failed. See Details for additional information.

Clicking on details gives:
"Flash Programmer: Flash driver reports the following error(s): Device Protection Error"

I know that when using the PEMicro PROGCFZ tool, I have to select the "Clear all locks" option before I can erase or flash the device - however, I can successfully erase the flash in CodeWarrior, yet I cannot flash it.

Can anyone provide any advice?

Thanks

David
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PaoloRenzo
Contributor V

Hi

 

I had the same problem and found CW need a small fix in the cfg file that comes with CW 7.1.

 

The main change is in red: I took the red value from CFflasher, which works smooth.

 

The cfg file:

 

; This is the board specific initialization file used in CodeWarrior Embedded product for ColdFire architecture
;        $RCSfile: MCF5475EVB_ROM.cfg,v $
;        $Revision: 1.2 $   $Date: 2005/07/19 09:42:23 $
; Please do NOT modifiy this file. If you wish to modify this file, please keep a backup copy of this file.

ResetHalt
; Used with M5485 ROM target

delay 100

;Set VBR - Initially at 0xFF800000
; Code moves this to RAMBAR0 later
writecontrolreg 0x0801 0xff800000

; If MBAR changes all following writes must change
;   and if a memory configuration file is used,
;   the reserved areas in the register block must
;   change also.
;Turn on MBAR at 0x1000_0000
writecontrolreg 0x0C0F 0x10000000

;Turn on RAMBAR0 at address 2000_0000
writecontrolreg 0x0C04 0x20000001;0x20000021

;Turn on RAMBAR1 at address 2000_1000
writecontrolreg 0x0C05 0x30000001;0x20001021

;Init CS1 (Code FLASH @ 4000_0000 - 40FF_FFFF 16Mbytes)
writemem.l 0x1000050C 0x40000000;
writemem.l 0x10000514 0x00001580;  16-bit port
writemem.l 0x10000510 0x01FF0001;

;Init CS0 (BootFLASH @ FF80_0000 - FF9F_FFFF 2Mbytes)
writemem.l 0x10000500 0xFF800000;
writemem.l 0x10000508 0x00101980;0x00001980;  16-bit port
writemem.l 0x10000504 0x001F0001;

;SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64Mbytes
writemem.l 0x10000004 0x000002AA;   SDRAMDS configuration
writemem.l 0x10000020 0x00000019;   SDRAM CS0 configuration (64Mbytes 0000_0000 - 03FF_FFFF)
writemem.l 0x10000024 0x00000000;   SDRAM CS1 configuration - not used
writemem.l 0x10000108 0x53722930;   SDCFG1
writemem.l 0x1000010C 0x24330000;   SDCFG2

writemem.l 0x10000104 0xE10F0002;   SDCR + IPALL
writemem.l 0x10000100 0x40010000;   SDMR (write to LEMR)
writemem.l 0x10000100 0x05890000;   SDRM (write to LMR)
writemem.l 0x10000104 0xE10F0002;   SDCR + IPALL
writemem.l 0x10000104 0xE10F0004;   SDCR + IREF (first refresh)
writemem.l 0x10000104 0xE10F0004;   SDCR + IREF (second refresh)
writemem.l 0x10000100 0x01890000;   SDMR (write to LMR)
writemem.l 0x10000104 0x710F0F00;   SDCR (lock SDMR and enable refresh)

delay 1000

 

I also edit my M5475EVB_EXTFLASH.xml (Freescale\CodeWarrior for ColdFire V7.1\bin\Plugins\Support\Flash_Programmer\ColdFire) as follows:

 

The xml file:

 

<?xml version="1.0" encoding="iso-8859-1" standalone="no" ?>

<fpconfig xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="fp_config.xsd">

  <targetconfwindow>
    <usecustomsettings>false</usecustomsettings>
    <targetprocessor>5475</targetprocessor>
    <connection></connection>
    <usetargetinit>true</usetargetinit>
    <targetinitfile>{CodeWarrior}\ColdFire_Support\Initialization_Files\M5475EVB.cfg</targetinitfile>
    <targetmembuffaddr>0x00000000</targetmembuffaddr>
    <targetmembuffsize>0x00006000</targetmembuffsize>
    <enablelogging>true</enablelogging>
    <verifywrites>false</verifywrites>
  </targetconfwindow>

  <flashconfwindow>
    <membaseaddr>0xFF800000</membaseaddr>
    <device>IN28F160C3B</device>
    <organization>1Mx16x1</organization>
    <flashstart>0xFF800000</flashstart>
    <flashend>0xFF9FFFFF</flashend>
  </flashconfwindow>

  <programverifywindow>
    <useselectedfile>false</useselectedfile>
    <projbuildtargetfile>nofile</projbuildtargetfile>
    <fileiotype>Auto Detect</fileiotype>
    <restrictaddrrange>false</restrictaddrrange>
    <restrictaddrrangestart>0xFF800000</restrictaddrrangestart>
    <restrictaddrrangeend>0xFF9FFFFF</restrictaddrrangeend>
    <applyaddroffset>false</applyaddroffset>
    <addroffset>0xFF800000</addroffset>
  </programverifywindow>

  <eraseblankcheckwindow>
    <eraseallsectors>true</eraseallsectors>
    <sector/>
    <processsectorsindividually>true</processsectorsindividually>
  </eraseblankcheckwindow>

  <checksumwindow>
    <computechecksumover>FileOnTarg</computechecksumover>
    <addrstart>0xFF800000</addrstart>
    <addrsize>0x0000FFFF</addrsize>
  </checksumwindow>

</fpconfig>

 

My mem file:

 

// Verdi (MCF547x/8x validation board)
//
// Mainly used to define reserved areas so debugger
// will not read those areas
//
//  Memory map:
//  0x0000_0000 - 0x01FF_FFFF  32MB DDR SDRAM
//  0x1000_0000 - 0x1003_FFFF  MBAR
// 0x1001_0000 - 0x1001_7FFF  MBAR/SRAM
// 0x2000_0000 - 0x2000_0FFF  4K SRAM0 (RAMBAR0)
// 0x2000_1000 - 0x2000_1FFF  4K SRAM1 (RAMBAR1)
// 0x4000_0000 - 0x4007_FFFF  CS1 (512K) External SRAM
// 0xFE00_0000 - 0xFFFF_FFFF  CS0 (32MB) External Flash
//
// All reserved ranges display 0xBABABABA
reservedchar 0xBA

// external SDRAM (64Mbytes) @0x00000000
range 0x00000000 0x03FFFFFF 4 readwrite

// from SDRAM end to MBAR at 0x1000_0000
reserved 0x04000000 0x0FFFFFFF

// from MBAR end to SRAM0 start
reserved 0x10040000 0x1FFFFFFF

// internal SRAM0 RAMBAR0 4K @0x20000000
range 0x20000000 0x20000FFF 4 readwrite

// internal SRAM1 RAMBAR1 4K @0x20001000
range 0x20001000 0x20001FFF 4 readwrite

// from SRAM1 end to CS1 start
reserved 0x20002000 0xDFFFFFFF

// external SRAM (CS1) (16M) @ 0xE0000000
range 0xE0000000 0xE0FFFFFF 2 read

// from CS1 end to CS0 start
reserved 0xE1000000 0xFF7FFFFF

// external Flash (CS0) (up to 8Mbytes) @ 0xFF80_0000
range 0xFF800000 0xFF9FFFFF 2 read

reserved 0xFFA00000 0xFFFFFFFF

// MBAR based Modules
// Primarily used to block out reserved
//  locations in the register block for
//  the memory window
//   MBAR=0x1000_0000
// We may not need to do every reserved area
//   within a defined module register block if
//   the module specifies that reads return 0
//   and writes have no affect - but experience
//   shows this not to be the case with other chips

// SIU MBAR+0x0000 - 0x00FF
reserved 0x10000000 0x10000003
reserved 0x10000008 0x1000000F
reserved 0x10000014 0x1000001F
reserved 0x10000030 0x10000037
reserved 0x1000003C 0x10000043
reserved 0x10000048 0x1000004F
reserved 0x10000054 0x100000FF

reserved 0x10000110 0x1000023F
reserved 0x1000029F 0x100004FF
reserved 0x10000548 0x100005FF

// reserved MBAR + 0x0600 - 0x06FF
reserved 0x10000600 0x100006FF

// INTC MBAR + 0x0700 - 0x07FF
reserved 0x1000071A 0x10000740
reserved 0x10000780 0x100007DF
reserved 0x100007E1 0x100007E3
reserved 0x100007E5 0x100007E7
reserved 0x100007E9 0x100007EB
reserved 0x100007ED 0x100007EF
reserved 0x100007F1 0x100007F3
reserved 0x100007F5 0x100007F7
reserved 0x100007F9 0x100007FB
reserved 0x100007FD 0x100007FF

// GPT MBAR + 0x0800 - 0x08FF
reserved 0x10000840 0x100008FF

// SLT MBAR + 0x0900 - 0x09FF
reserved 0x10000920 0x100009FF

// GPIO MBAR + 0x0A00 - 0x0AFF
reserved 0x10000A54 0x10000AFF

// PCI MBAR + 0x0B00 - 0x0BFF
reserved 0x10000B18 0x10000B27
reserved 0x10000B40 0x10000B5F
reserved 0x10000B7C 0x10000B7F
reserved 0x10000B8C 0x10000BF7
reserved 0x10000BFC 0x10000BFF

// PCIARB MBAR + 0x0C00 - 0x0CFF
reserved 0x10000C08 0x10000CFF

// EXTDMA MBAR + 0x0D00 - 0x0DFF
reserved 0x10000D0C 0x10000D0F
reserved 0x10000D1C 0x10000D1F
reserved 0x10000D20 0x10000DFF

// reserved MBAR + 0x0E00 - 0x0EFF
reserved 0x10000E00 0x10000EFF

// EPORT MBAR + 0x0F00 - 0x0FFF
reserved 0x10000F07 0x10000FFF

// reserved MBAR + 0x1000 - 0x7EFF
reserved 0x10001000 0x10007EFF

// CTM MBAR + 0x7F00 - 0x7FFF
reserved 0x10007F20 0x10007FFF

// DMA MBAR + 0x8000 - 0x80FF

// reserved MBAR + 0x8100 - 0x83FF
reserved 0x10008100 0x100083FF

// SCPCI MBAR + 0x8400 - 0x84FF
reserved 0x10008420 0x1000843F
reserved 0x10008458 0x1000847F
reserved 0x10008494 0x10008497
reserved 0x100084A0 0x100084BF
reserved 0x100084D8 0x100084FF

// reserved MBAR + 0x8500 - 0x85FF
reserved 0x10008500 0x100085FF

// PSC0 MBAR + 0x8600 - 0x86FF
reserved 0x10008620 0x10008633
reserved 0x100086A0 0x100086FF

// PSC1 MBAR + 0x8700 - 0x87FF
reserved 0x10008720 0x10008733
reserved 0x100087A0 0x100087FF

// PSC2 MBAR + 0x8800 - 0x88FF
reserved 0x10008820 0x10008833
reserved 0x100088A0 0x100088FF

// PSC3 MBAR + 0x8900 - 0x89FF
reserved 0x10008920 0x10008933
reserved 0x100089A0 0x100089FF

// DSPI MBAR + 0x8A00 - 0x8AFF
reserved 0x10008A04 0x10008A07
reserved 0x10008A4C 0x10008A7B
reserved 0x10008A8C 0x10008AFF

// reserved MBAR + 0x8B00 - 0x8EFF
reserved 0x10008B00 0x10008EFF

// I2C MBAR + 0x8F00 - 0x8FFF
reserved 0x10008F14 0x10008F1F
reserved 0x10008F24 0x10008FFF

// FEC0 MBAR + 0x9000 - 0x97FF
reserved 0x10009000 0x10009003
reserved 0x100091CC 0x100097FF

// FEC1 MBAR + 0x9800 - 0x9FFF
reserved 0x10009800 0x10009803
reserved 0x100099CC 0x10009FFF

// CAN0 MBAR + 0xA000 - 0xA7FF
reserved 0x1000A00C 0x1000A00F
reserved 0x1000A024 0x1000A027
reserved 0x1000A02C 0x1000A02F
reserved 0x1000A034 0x1000A07F
reserved 0x1000A180 0x1000A7FF

// CAN1 MBAR + 0xA800 - 0xAFFF
reserved 0x1000A80C 0x1000A80F
reserved 0x1000A824 0x1000A827
reserved 0x1000A82C 0x1000A82F
reserved 0x1000A834 0x1000A87F
reserved 0x1000A980 0x1000AFFF

// USB MBAR + 0xB000 - 0xB7FF
reserved 0x1000B008 0x1000B00B
reserved 0x1000B018 0x1000B03F
reserved 0x1000B090 0x1000B0FF
reserved 0x1000B110 0x1000B12F
reserved 0x1000B138 0x1000B13B
reserved 0x1000B140 0x1000B147
reserved 0x1000B150 0x1000B157
reserved 0x1000B15C 0x1000B15F
reserved 0x1000B168 0x1000B16B
reserved 0x1000B170 0x1000B177
reserved 0x1000B180 0x1000B187
reserved 0x1000B18C 0x1000B18F
reserved 0x1000B198 0x1000B19B
reserved 0x1000B1A0 0x1000B1A7
reserved 0x1000B1B0 0x1000B1B7
reserved 0x1000B1BC 0x1000B1BF
reserved 0x1000B1C8 0x1000B1CB
reserved 0x1000B1D0 0x1000B1D7
reserved 0x1000B1E0 0x1000B1E7
reserved 0x1000B1EC 0x1000B1EF
reserved 0x1000B1F8 0x1000B1FB
reserved 0x1000B200 0x1000B207
reserved 0x1000B210 0x1000B217
reserved 0x1000B21C 0x1000B21F
reserved 0x1000B228 0x1000B22B
reserved 0x1000B230 0x1000B237
reserved 0x1000B240 0x1000B247
reserved 0x1000B24C 0x1000B3FF
reserved 0x1000B418 0x1000B43F
reserved 0x1000B470 0x1000B47F

reserved 0x1000B600 0x1000B7FF

// reserved MBAR + 0xB800 - 0xFFFF
reserved 0x1000B800 0x1000FFFF

// SRAM MBAR + 0x1_0000 - 0x1_7FFF
range 0x10010000 0x10017FFF 4 readwrite

// reserved MBAR + 0x1_8000 - 0x1_FEFF
reserved 0x10018000 0x1001FEFF

// SRAMCFG MBAR + 0x1_FF00 - 0x1_FFFF
reserved 0x1001FF00 0x1001FFBF
reserved 0x1001FFC2 0x1001FFC3
reserved 0x1001FFD4 0x1001FFFF

// SEC MBAR + 0x2_0000 - 0x3_FFFF
reserved 0x10020000 0x100200FF
reserved 0x10024000 0x10026FFF
reserved 0x10033000 0x1003FFFF

 

My LCF file:

 

#/*                                                                              
# * File:  flash.dld                                                       
# * Purpose: Linker file for M5475EVB and M5485EVB
# *                                                                              
# * Notes:  Creates a Flash bootable image
# */                                                                             

MEMORY
{
    text    (RX) : ORIGIN = 0xFF800000,  LENGTH = 0x00200000
    data    (RW) : ORIGIN = 0x00000480,  LENGTH = 0
    bss     (RW) : ORIGIN = AFTER(data), LENGTH = 0
}

SECTIONS
{
 ___MBAR    = 0x10000000;

 ___SDRAM   = 0x00000000;
 ___SDRAM_SIZE  = (64 * 1024 * 1024);

    ___SYS_SRAM   = ___MBAR + 0x00010000;
 ___SYS_SRAM_SIZE = (32 * 1024);

    ___MCDAPI_START     = ___SYS_SRAM;
    ___MCDAPI_SIZE      = (12 * 1024);

 ___CORE_SRAM0  = 0x20000000;
 ___CORE_SRAM0_SIZE = (4 * 1024);

 ___CORE_SRAM1  = 0x20001000;
 ___CORE_SRAM1_SIZE = (4 * 1024);

 ___CODE_FLASH  = 0xE0000000;
 ___CODE_FLASH_SIZE = (16 * 1024 * 1024);

 ___BOOT_FLASH  = 0xFF800000;
 ___BOOT_FLASH_SIZE = (2 * 1024 * 1024);

 ___VECTOR_RAM  = ___SDRAM;

 .text :
 {
        .     = ALIGN(0x10);
  vectors.s (.text)
  *(.text)
  *(.rodata)
         .     = ALIGN(0x10);
  ___DATA_ROM  = .;
   } > text

    .data : AT(___DATA_ROM)
    {
        .     = ALIGN(0x10);
  ___DATA_RAM  = .;
  *(.data)
  *(.sdata)
  ___DATA_END  = .;
        .     = ALIGN(0x10);
    } > data

    .bss :
    {
  .    = ALIGN(0x10);
  ___BSS_START = .;
  *(.sbss)
  *(SCOMMON)
  *(.bss)
  *(COMMON)
  ___BSS_END   = .;
        .    = ALIGN(0x10);
    } > bss

    ___HEAP_START = .;
    ___HEAP_END  = ___HEAP_START + (256*1024);
    ___SP_END  = ___HEAP_END;
    ___SP_INIT  = ___SP_END + (8*1024);
}

 

Also note the following:

 

-I'm using 0xFF80_0000 as the boot flash base address. The "load settings" button while using flash programmer from CW points to a modified xml file. Mem file and LCF while modified to avoid errors. See above.

-I replaced this cfg file with the one that is at CW installation files. Must be at Freescale\CodeWarrior for ColdFire V7.1\ColdFire_Support\Initialization_Files

-The cfg file that comes with the project was replaced by this one too.

-I have not reviewed the SDRAM values, but seems they work OK.

-As a template, I used the example codes that comes with the mcf547x web page. They are more easy to follow than the one generated by CW. Go to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MCF547X&nodeId=0162468rH3YTLC00M93426...

 

Now I can download using flash programmer and debug using CW. Of course CFflasher is an alternate tool to download code without further debugging.

 

Hope this is useful for someone.

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Jaimy
Contributor I
Hai,
I am using MCF5475 processor. I am having same problem with code warrior. Have u solved the problem?
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Udo
Contributor I
Hello David,
 
i am using the MCF5485EVB and the CodeWarrior 6.3 Special Edition. I have the same problems like you. Do you have solved the problem?
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Ivychacha
Contributor I
try to use the CFlasher to flash. It's a free flash tool and it should be available on the freescale's website

also check your DB_EN jumper(if you have it, i don't know about your board), it will protect a part of the flash to be read only.

--
Ivy

Message Edited by Ivychacha on 2006-10-1208:22 AM

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