LS1012A MDIO Interface

[rahulsoni]

Hello NXP Team,

I'm designing a custom board based on LS1012A which has an ethernet switch IC and another ethernet PHY.

I have 3 MDIO interfaces in total while my processor supports only one MDIO interface.

I have read that an MDIO interface can manage up to 32 PHYs with different PHY addresses.

I want to confirm if MDIO driver of LS1012A can support the connection to more than 1 PHYs on MDIO interface?

Can I connect 3 MDIO interfaces of different PHYs to the MDIO interface on LS1012A?

Please confirm. 

[yipingwang]

Hello Rahul Soni ,

In LS1012A, there are two MDIO controllers coming out from PFE and one MDIO per MAC is provided.

The MDIO ports are connected in the chip as follows:
• MDIO1: It has connectivity for external off-chip PHY registers as well as on-chip SGMII1 PCS registers.

The selection occurs based on the
SCFG_MDIOSELCR[MDIOSEL] bit as follows:

• 0: MDIO from SerDes
• 1: MDIO from external Ethernet PHY

• MDIO2: It has connectivity for on-chip SGMII2 PCS registers.

Have a great day,
TIC

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