IICF = 0x40; // Set IIC frequency,100kbit (4MHz oscillator) IICC1_IICEN = 1; // Enable IIC IICC1_IICIE = 1; // Enable IIC interrupts IICA = 0xC0; // IIC Address I2C_STEP = IIC_READY_STATUS; I2C_DATA[0]='A'; // test data I2C_DATA[1]='B'; I2C_DATA[2]='C';//want to set my controller to be master, to send smth afterwards... IICC1_MST = 1;
Solved! Go to Solution.
IICA = 0x0A;// set my own slave address IICC1_TXAK = 1; // don't generate ACK by master IICC1_MST = 0; // slave mode IICF = 0x4B;// IIC-frequency setting 0x60 for 100 kHz IICC1_IICEN = 1; // enable IIC IICS_IICIF = 1; //clear interrupts
void writeByteIIC(UINT8 slaveAddr, UINT8 regAddr, UINT8 dataByte) { slaveAddr = slaveAddr & 0xFE; // make R/W-bit = 0, so master transmits to slave IICC1_TX = 1; // set transmit mode IICC1_MST = 1; // START signal //send slave address IICD = slaveAddr; //write data to Bus while (!IICS_IICIF);//wait for IICIF flag IICS_IICIF = 1; //clear the interrupt flag IICIF by writing logic one while (IICS_RXAK); //wait for acknowledge //send data address IICD = regAddr; //write data to Bus while (!IICS_IICIF);//wait for IICIF flag IICS_IICIF = 1; while (IICS_RXAK); //wait for acknowledge //send data IICD = dataByte; //write data to Bus while (!IICS_IICIF);//wait for IICIF flag IICS_IICIF = 1; while (IICS_RXAK); //wait for acknowledge //STOP signal IICC_MST = 0; }
Hello again,
I did some tests right now:
If the IICC1_IICEN-bit is enabled(=1), I can only clear the MST-bit (from 1 to 0). If IICEN is set, I cannot set the MST bit (from 0 to 1). I mean, it could be that my Bus-node switches from master to slave if some other master begins to sent out smth. It should be possible to set the "own" IIC-bus-node to master and slave as necessary... it seems to me, that is is not
don't understand that.
Now following the chapter 11.7 of the datasheet (preliminary version 06/2007) the order of initializing the IIC is the following:
1. IICF set baud rate
2. IICC1 enable IIC and interrupts
3. Initialize RAM variables (IICEN=1 and IICIE=1) for transmit data
4. initialize RAM variables used to achieve the routine shown in Fig11-12
5. write IICC1 to enable TX
6. write IICC1 to enable Master
7. write IICD address of target slave
What do steps 3 and 4 mean ("initialize RAM" ) ? For step 3 I initialized IICEN and IICIE as mentioned in the paranthesis, but for step 4 I do not recognize what is meant with the RAM-variables "used to achieve the routine shown in Fig11-12"... What is meant here?
somebody got any tips/hints?
mg,
Johannes
PS: as you may have noted I'm new to IIC, didn't use it up to now.
IICA = 0x0A;// set my own slave address IICC1_TXAK = 1; // don't generate ACK by master IICC1_MST = 0; // slave mode IICF = 0x4B;// IIC-frequency setting 0x60 for 100 kHz IICC1_IICEN = 1; // enable IIC IICS_IICIF = 1; //clear interrupts
void writeByteIIC(UINT8 slaveAddr, UINT8 regAddr, UINT8 dataByte) { slaveAddr = slaveAddr & 0xFE; // make R/W-bit = 0, so master transmits to slave IICC1_TX = 1; // set transmit mode IICC1_MST = 1; // START signal //send slave address IICD = slaveAddr; //write data to Bus while (!IICS_IICIF);//wait for IICIF flag IICS_IICIF = 1; //clear the interrupt flag IICIF by writing logic one while (IICS_RXAK); //wait for acknowledge //send data address IICD = regAddr; //write data to Bus while (!IICS_IICIF);//wait for IICIF flag IICS_IICIF = 1; while (IICS_RXAK); //wait for acknowledge //send data IICD = dataByte; //write data to Bus while (!IICS_IICIF);//wait for IICIF flag IICS_IICIF = 1; while (IICS_RXAK); //wait for acknowledge //STOP signal IICC_MST = 0; }