T2081: Booting from IFC NOR - flash (0xE000_0000 to 0xE7FF_FFFF)

[noufalp90]

Hi Team,

I have a custom board based on T2081, with 128Mbytes IFC NOR FLASH address as boot media. We would like to configure the processor to fetch the RCW from 0xE8000000. But when we flash RCW at 0xE800_0000 we are not seeing any activities on the CS and HRESET is held LOW (Board is under reset) after power ON. So, we flashed the RCW at 0xE000_0000 and with this, we are seeing CS is toggling multiple times and HRESET is high after Power ON (Board is out of reset). Even though we flashed u-boot at 0xE7F4_0000 location, we are not seeing any boot prints on the console.

Following are my queries regarding IFC nor boot,

1.   How Processor know the address to fetch RCW from IFC NOR flash?  0xE000_0000 or 0xE800_0000

2. In TRM it is mentioned that after reset, core will start execution at 0xFFFF_FFFFC and then jump to the NOR flash address. How is this configuration controlled?

3. In debug mode all the LAW registers and DDR configs are done by the TCL script (In my case, RAM TCL script). But in flash boot mode, how these configurations are taken care?

Thanks,

Noufal

[yipingwang]

1. The system will fetch RCW at the beginning of NOR flash, and u-boot should be deployed at the end of NOR flash. 

2. This is controlled by hardware, the processor will fetch the instruction from the end of NOR flash.

3. Please use NOR flash configuration 0xE8000000- 0xEFFFFFFF in the tcl CW initialization file.

The NOR flash memory map should be 0xE8000000 to  0xEFFFFFFF, 0xE000_0000 is not valid effective address at all.

[noufalp90]

Thank you for your reply.
2. tcl CW initialization file means "T2081QDS_init_core.tcl
" for DDR load?

Regards,
Noufal

[yipingwang]

If you have customized DDR controller initialization parameters, you could use T2081QDS_init_core.tcl.

We often suggest the customer use T2081QDS_init_sram.tcl to avoid DDR controller initialization during flash programming.

[noufalp90]

Got it.
Another thing which is confusing is,
Configuration we added in the `T2081QDS_init_sram.tcl ` file is only used during debug mode or configuration from the tcl file will be written into the memory(ROM or any) inside processor and used during NOR flash boot ?

Thanks,
Noufal

[yipingwang]

T2081QDS_init_sram.tcl is only used in debug mode or to do flash programming.

[noufalp90]

Okay,
So during NOR flash boot mode, how is configurations are done (LAW/IFC etc)
For e.g. In my case, my flash memory is only 128MB and address is range from 0xE8000000- 0xEFFFFFFF. How are these cases taken care?

[yipingwang · Accepted solution]

Please refer to T2081QDS_init.c in source folder.

The default NOR memory map is

0xE8000000 0xEFFFFFFF

[noufalp90]

I got the point.
But what about the LAW register configuration for each interface.
In the debug mode, we are doing everything in the TCL config file. But we are not aware of the same configuration for NOR flash boot. Suppose If have to modify any of the LAW register based on my interface list, how can I proceed with the configuration for nor flash boot?

[yipingwang]

Please refer to the section "Local Access Windows Setup" in T2081QDS_init.c.

[noufalp90]

Okay, If you select SRAM version of configuration, file 'T2081QDS_init.c' is in the disabled mode (refer attached image). So do we need to modify this file for custom changes?

Also by default this file has TLB configuration for NOR as follows. (refer attached image). 

[yipingwang]

Yes, no need to modify T2081QDS_init.c, you could use the default TLB and LAW configurations.

[noufalp90]

Understood. In any case if we want to modify the default TLB and LAW configs for NOR flash boot, how can we do the same?

For e.g.

Instead of 128MB NOR flash with T2081, If I want to use 256MB NOR flash, I think TLB and LAW configs has to be modified. So How can I do that?

Thanks,

Noufal 

[yipingwang]

If you are using 256M NOR flash, please modify the memory map

form 0xE0000000 to 0xEFFFFFFF.