How do I configure the initialization TCL file for NOR flash boot mode on the T2081 processor?

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How do I configure the initialization TCL file for NOR flash boot mode on the T2081 processor?

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Vimalprasad
Contributor I

In JTAG mode, we provide the configuration TCL file in the debug setup. During debugging, it connects to the board, enters the DDR, and starts executing the application.

In NOR Flash boot mode, who instructs the processor to start from the NOR Flash address location (0xE8000000)?

Can you tell me ,How the initialization TCL file (T2081QDS_init_core.tcl) configured in the NOR flash boot mode on the T2081 processor?

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yipingwang
NXP TechSupport
NXP TechSupport

For PowerPC processor, each core begins execution with the instruction at effective address
0x0_FFFF_FFFC, it maps to the end of IFC NOR flash by hardware.

In CodeWarrior project, please configure the project as "ROM" version, then rebuild this project.

The following is ROM version LCF file configuration.

MEMORY {
ram    : org = 0x00002000, l = 0x7FFFFFFF
rom   : org = 0xEFF10000, l = 0x000EEFFF
}
 
SECTIONS
{
 
  _stack_addr = 0x003dfff0;
  _stack_end  = 0x003d7ff0;
  
  _heap_addr  = 0x3cfff0;
  _heap_end   = 0x3d7ff0;
 
  .intvec 0xEFF00000 :
  {
    *(.intvec)
  } = 0xffff
  
  .reset 0xEFFFFFFC :
  {
    *(.reset)
  } = 0x4
 
  .init 0xEFFFF000 :
  {
    *(.init)
    *(.init_data)
  } = 0xFFC
  
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Vimalprasad
Contributor I

Thanks for your reply,

While configuring the project as ROM version, in the source folder where two files which are T2081QDS_init.c and the T2081QDS_init.h. 

Any changes need to be made in these files or no?

I'm using my NOR flash address from 0xE0000000 to 0xE7FFFFFF(128MB).

Can you please tell me what are the things have to done for creating the test image and where I have to load the test image?

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yipingwang
NXP TechSupport
NXP TechSupport

No need to modify the NOR flash memory map in 2081QDS_init.c.

You need to configure NOR flash from 0xE8000000 to 0xEFFFFFFF.

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