I write a .cfg file but I seems have no affection to this. No matter how I modify it. It just perform the same.
Here is the configure file content.
writereg MBAR 0x0f000000
writemmr IMMR 0x01000000
writereg MBAR 0x01000000
#Main System Clock Configuration Registers
writemmr SYPCR 0xFFFFFF81 # SYPCR: turn off watchdog timer
writemmr SCCR 0x00000001 # Force baud rate clock divisor = 16
writemmr RMR 0x0001 # generate reset when core enters checkstop state.
# Setup the chip selects
# CS0 - 32MB flash
writemmr BR0 0xFE001001
writemmr OR0 0xFE000876
# CS1 - 8MByte(2*16bits + 2*16bits) SRAM
writemmr BR1 0x10001801
writemmr OR1 0xFF800876
writemmr MPTPR 0x2000 # MPTPR: Set the Memory Periodic Timer Prescaler
writemmr PSRT 0x1F # set 60x Bus assigned SDRAM Refresh Timer (PSRT) ~ 15.6us
writemmr SIUMCR 0x05340C00 # Set SIU configuration bits
writemmr TESCR1 0x00004000 # 60x bus data errors disabled
writemmr L_TESCR1 0x00004000
writereg MSR 0x3002 # Machine Mode Register
From my view, after I write MBAR, then I can write and read at least IMMR. And I try to just write MBAR and IMMR. I still can not access the IMMR. It still stay on zero.