Environment:
- IDE: CodeWarrior 5.1 (HC(S)12X compiler)
- Target: MC9S12XEQ512
- Bus clock: 49.777 MHz
- BDM interface: reproducible with USB Multilink Universal; not observed with Cyclone Pro
- Host OS: observed on both Windows 10 and Windows 11
- Memory model: reproducible in Large model; not (or much less) reproducible in Banked model
Setting used:
"HC12MultilinkCyclonePro" → "Setup..." → "Debug otions " → "Disable maskable ISR's when stepping" — enabled.
Description:
After a number of step operations (single step or step over) in the debugger, the maskable interrupts (I bit in CCR) become permanently disabled. Interrupts do not resume even after continuing execution (Run/Go) — they remain masked until the I bit is manually cleared in the CCR register view. This behavior is consistently reproducible in the Large memory model using the USB Multilink Universal BDM interface, on both Windows 10 and Windows 11 hosts. The issue has not been observed with the Cyclone Pro interface under otherwise identical project settings, nor (or much less) in the Banked memory model
Workaround currently in use:
Manually clearing the I bit in the CCR register view after it becomes stuck.
Request:
Is this a known issue with the USB Multilink Universal firmware/driver in combination with CodeWarrior 5.1's stepping emulation on the S12X core? Is there a fixed Multilink Universal firmware version, or a recommended alternative workflow for debugging interrupt-driven Large-model projects on this device/interface combination?
Thank you
