CW 2.10 for MPC56, how to change RAM mapping in LCF file?

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CW 2.10 for MPC56, how to change RAM mapping in LCF file?

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Lundin
Senior Contributor IV

Using CW 2.10 for MPC5643L (cut 3.1).

 

I'm trying to re-map the RAM areas for my project. Default mapping by Freescale is as follows:

 

internal_ram:      org = 0x40000000,   len = 0x0001C000
heap  :            org = 0x4001C000,   len = 0x00002000 /* z4 Heap start location */
stack :            org = 0x4001E000,   len = 0x00001f00 /* z4 Start location for Stack */

 

Now, this memory map has a lot of problems. Surprisingly, I'm using this safety MCU in a safety-critical application. So first of all I want to get rid of the heap entirely: dynamic memory allocation is completely banned by SIL, MISRA etc. Also, I don't want my stack to down-count into my variables! If I would for some reason get a stack overflow, the MPC56 would go completely haywire with this memory map, rather than to give an exception.

 

This is what I did and it seems to work fine:

 

stack :            org = 0x40000000,   len = 0x00002000
internal_ram:      org = 0x40002000,   len = 0x0001C000

 

But now I also want to add a custom memory segment of 64k for some special variables. I'd also like to use the whole 128k of RAM.

I change to the following:

 

stack :            org = 0x40000000,   len = 0x00002000
internal_ram:      org = 0x40002000,   len = 0x0000E000
ram_param_image:   org = 0x40010000,   len = 0x00010000

 

    GROUP : {

      .ram_param :{}

    } > ram_param_image

 

And then in my C code:

 

#pragma push

#pragma section data_type ".ram_param" ".ram_param"

__declspec(section ".ram_param")

 

static uint8_t ram_nvm_mirror [RAM_NVM_SIZE];

#pragma pop

 

This also works fine... as long as I have my debugger attached. When I try to run the program stand-alone with no JTAG connected, the program just hangs. If I remove my custom section and put the custom variable in default RAM (.bss), then everything works fine without the debugger attached. The debugger is Lauterbach Trace 32.

 

Any idea what might be causing this? Did I write the #pragma correctly? Have I misunderstood the memory mapping?

 

The MPC5643L should have 128k RAM. As far as I can tell, it should go from 0x4000 0000 and upwards. (The manual chapter 2 is a bit confusing since it mentions 0x5000 0000. I did try to put my custom variable there, but then I got IVOR1, debugger or not, so that address doesn't seem valid.)

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Lundin
Senior Contributor IV

Wow, so Freescale actually takes the contents of your service requests and publish them on the internet without permission? Including proprietary source code. This is so utterly unprofessional, I lack words for it...

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trytohelp
NXP Employee
NXP Employee


Hello Daniel,

I'm apologized for that.

I've deleted the message.

After to have reviewed the activities associated to the SR, I thought it could be interesting for other community members to have the information too.

For my understanding the info I shared didn't included critical information.

sorry for that.

The message has been removed fat the post.

Regards

Pascal

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stanish
NXP Employee
NXP Employee

Hello Lundin,

The memory mapping depends on the MCU mode. I assume you are using Lock Step Mode (LS). In this mode SRAM starts at 0x4000_0000 and has 128kB (0x2_0000).

The SRAM address 0x5000_0000 could be used in Decoupled Parallel Mode (DP).

Based on the posted information I don't observe anything suspicious...


Do you use default CodeWarrior generated startup?

Can you possibly attach generated .map file?

Thanks!

Stan

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