Slo-Mo Debug with slow clock

[Wings]

The layout: Codewarrior 5.1, assembly, P&E debugger with QG8 demo board.

I'm trying to use the internal reference clock (in FBILP mode) for the chip's clock. I need low power and don't need speed. The data sheet says that in this mode the ICSLCLK (from the FLL) is disabled and therefore cannot be used for the BDM clock. So it uses the BUSCLK, which is really slow. Screen updates in the debugger take forever. OK, I understand that.

So, until I get mu code debugged I try using FBI mode. Says that in this mode the FLL is enabled and the ICSLCLK will be used to drive the BDM. I expected to see a full-speed debugging session in this mode, but I don't. It's the same when in FBILP.

What do I need to do to get a slow BUSCLK for my app and a fast clock for the BDM?

In FBILP mode I have:
ICSC1 = %01000110 (Int ref clock selected, IREFS=1, IRCLKEN=1)
ICSC2 = %00001000 (Bus Freq /1, LP = 1)

In FBI mode I have:
ICSC1 = %01000110 (Int ref clock selected, IREFS=1, IRCLKEN=1)
ICSC2 = %00000000 (Bus Freq /1, LP = 0)

Also, in both modes SOPT1 = %11010010 (COP on, debug pin enabled, reset disabled)

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Second Question: What exactly is the function of ICSIRCLK (enabled by IRCLKEN)? The data sheet describes how the signal is generated, but not where or how it is used (search the data sheet pdf for ICSIRCLK).

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Third Question: In ICSCS2 it says for the LP bit when set, "1 FLL is disabled in bypass modes unless BDM is active". This would lead me to believe that, contrary to what it says (10.4.1.4) about the FLL not being available for BDM, that the FLL is available when debugging when LP is 1. And if the FLL is available for the BDM clock, shouldn't that make for a normal speed debugging session even when LP is a 1? Can anyone clear this up for me?

[RockyRoad]

Wings -

1. The way to select the alternate clock is the CLKSW bit in the BDSCR register. The bit is 1 after a reset in active BDM mode (selects bus clock) and it is 0 after a normal reset (alternate clock). The problem is that the normal way that the Multilink or Cyclone Pro connects is by resetting into active BDM mode (BDM pin held low during reset). As far as I can find so far there is no command from inside CodeWarrior to change the clock source. (I've sent an email to P&E to see if there is something that I'm missing, but I haven't heard back from them yet today. I'm heading out on vacation so I've alerted someone else here to watch for the reply and add it to this thread.) A suggested workaround is to load the code, remove the BDM tool, reset the target, attach the tool, hit debug again, and select the hotsync option (in CW 5.x) when the connect dialog comes up. This would get you reset in normal mode with the alternate clock. I haven't been able to try this today, so it's just a theory at this point.

2. The ICSIRCLK doesn't go anywhere in the QG8. It is an optional output from the ISC block that could be used. The ICS chapter is generic so that it can be reused in other documentation.

3. Yes, you understand it right. In active BDM mode, you actually can't get into FBILP mode. It just stays in FBI mode because you're using the BDM. The problem still is that you need to be able to change the CLKSW bit as in 1 above.

- Rocky

[TomHTI]

Any updates on this post? I have the same problem. I'm using a slow clock (512kHz) and when I write ICGC2 to select the clock the ICD Connection Manager pops up. When I select "Hotsync", all of the memory is filled with $FF.