S08TPMV3 glitch-free initialization?

[Obetz]

Hello All,

how can I preset the output compare flipflop of the S08TPMV3 to get a glitch-free initialization?

IOW if the pin was temporarily used as GPIO and I set  ELSnB:ELSnA from 0:0 to "set" or "clear", the pin has to stay in correct state until the output compare triggers.

In my tests, the pin switched immediately to the last state caused by an active OC event when I set ELSnB:ELSnA.

If this event had the wrong polarity, the output switches immediately (I can't tolerate this).

Is there any workaround?

Thanks in advance,

Oliver

[bigmac]

Hello Oliver,

I presume that the TPM operation is correct immediately after a reset, where the initial channel output state will be determined by the GPIO setting that preceeded the enabling of the TPM channel.  The TPM module itself does not seem to provide for explicit setting or clearing the initial channel output state (which the old HC908 TIM module did provide).

Perhaps there are a few things you might try to see if it is possible to "reset" the TPM module:

1. If you are currently clearing only the ELSnB:ELSnA bits, try clearing all bits within the TPMxCnSC register prior to re-initialising the GPIO pin, or
2. Temporarily disable the TPM module by clearing the bits CLKSA:CLKSB within the TPMxSC register, or
3. Clear the TPM counter by writing to the TPMxCNT register.

Regards,

Mac

[Obetz]

Hello Mac,

you wrote what I also expected / wished, but sadly it's not what we get:

0. The initial output state under TPM control is not determined by the previous output state in GPIO mode. Not after reset and not later. Out of reset, the initial state is 0. So the TPM can't produce a 0 pulse starting at a certain CNT value without a preceding '0' glitch!

1. Setting TPMxCnSC to 0 doesn't change the state of the internal flipflop. As soon as you change it to output compare with pin control, the pin switches to the last state under OC control.

2. Disabling the TPM module doesn't change the state of the internal flipflop.

3. Clearing the TPM counter doesn't change the state of the internal flipflop.

It would be extremly disappointing if the S08TPMV3 had really no way to control the putput flipflop.

Oliver

[rickstuart]

Is this (still) true?  Because I am running into the same issue with newer NXP chips.  Specifically the KL17.  In order to control an output pin with TPM0, I have to "condition" the timer by running it through the sequence of TPM0 events at least once before expected / dependable results are obtained.

-thanks